From patchwork Wed Dec 18 15:29:58 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagannadha Sutradharudu Teki X-Patchwork-Id: 302947 X-Patchwork-Delegate: albert.aribaud@free.fr Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3D4772C00A5 for ; Thu, 19 Dec 2013 02:36:30 +1100 (EST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E55EE4A9FA; Wed, 18 Dec 2013 16:36:20 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Mcy9foR1rLF7; Wed, 18 Dec 2013 16:36:20 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DA6214AAC2; Wed, 18 Dec 2013 16:33:15 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 9521C4AA92 for ; Wed, 18 Dec 2013 16:32:21 +0100 (CET) X-Virus-Scanned: Debian amavisd-new at theia.denx.de Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id esE4H5yFESeU for ; Wed, 18 Dec 2013 16:32:17 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from db8outboundpool.messaging.microsoft.com (mail-db8lp0187.outbound.messaging.microsoft.com [213.199.154.187]) by theia.denx.de (Postfix) with ESMTPS id 49C694A543 for ; Wed, 18 Dec 2013 16:30:56 +0100 (CET) Received: from mail1-db8-R.bigfish.com (10.174.8.254) by DB8EHSOBE009.bigfish.com (10.174.4.72) with Microsoft SMTP Server id 14.1.225.22; Wed, 18 Dec 2013 15:30:54 +0000 Received: from mail1-db8 (localhost [127.0.0.1]) by mail1-db8-R.bigfish.com (Postfix) with ESMTP id C96B7158015E; Wed, 18 Dec 2013 15:30:54 +0000 (UTC) X-Forefront-Antispam-Report: CIP:149.199.60.83; KIP:(null); UIP:(null); IPV:NLI; H:xsj-gw1; RD:unknown-60-83.xilinx.com; EFVD:NLI X-SpamScore: 1 X-BigFish: VPS1(zzzz1f42h2148h208ch1ee6h1de0h1fdah2073h2146h1202h1e76h2189h1d1ah1d2ah1fc6hzz1de098h17326ah8275bh8275dh1de097h186068hz2fh95h839hd24hf0ah119dh1288h12a5h12a9h12bdh12e5h137ah139eh13b6h1441h14ddh1504h1537h162dh1631h1758h1898h18e1h1946h19b5h1b0ah224fh1d0ch1d2eh1d3fh1dfeh1dffh1e1dh1e23h1fe8h1ff5h2218h2216h226dh2327h2336h906i1155h) Received-SPF: pass (mail1-db8: domain of xilinx.com designates 149.199.60.83 as permitted sender) client-ip=149.199.60.83; envelope-from=jagannadha.sutradharudu-teki@xilinx.com; helo=xsj-gw1 ; helo=xsj-gw1 ; Received: from mail1-db8 (localhost.localdomain [127.0.0.1]) by mail1-db8 (MessageSwitch) id 1387380653442738_31861; Wed, 18 Dec 2013 15:30:53 +0000 (UTC) Received: from DB8EHSMHS030.bigfish.com (unknown [10.174.8.245]) by mail1-db8.bigfish.com (Postfix) with ESMTP id 67B7117C004A; Wed, 18 Dec 2013 15:30:53 +0000 (UTC) Received: from xsj-gw1 (149.199.60.83) by DB8EHSMHS030.bigfish.com (10.174.4.40) with Microsoft SMTP Server id 14.16.227.3; Wed, 18 Dec 2013 15:30:52 +0000 Received: from unknown-38-66.xilinx.com ([149.199.38.66] helo=xsj-smtp1) by xsj-gw1 with esmtp (Exim 4.63) (envelope-from ) id 1VtJ5H-0005HE-Um; Wed, 18 Dec 2013 07:30:51 -0800 From: Jagannadha Sutradharudu Teki To: Date: Wed, 18 Dec 2013 20:59:58 +0530 X-Mailer: git-send-email 1.8.3 In-Reply-To: <1387380620-29228-1-git-send-email-jaganna@xilinx.com> References: <1387380620-29228-1-git-send-email-jaganna@xilinx.com> X-RCIS-Action: ALLOW MIME-Version: 1.0 Message-ID: X-OriginatorOrg: xilinx.com X-FOPE-CONNECTOR: Id%0$Dn%*$RO%0$TLS%0$FQDN%$TlsDn% Cc: Tom Rini , Jagannadha Sutradharudu Teki Subject: [U-Boot] [PATCH v2 13/35] zynq: Add zynq zc70x board support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.11 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: u-boot-bounces@lists.denx.de Errors-To: u-boot-bounces@lists.denx.de The Zynq-7000 APSOC zc702 and zc706 enabled complte embedded processing includes ASIC and FPGA design. ZC702-: APSOC: - XC7Z020-CLG484-1 Memory: - DDR3 Component Memory 1GB - 16MB Quad SPI Flash - IIC - 1 KB EEPROM Connectivity: - Gigabit Ethernet GMII, RGMII and SGMII. - USB OTG - Host USB - IIC Bus Headers/HUB - 1 CAN with Wake on CAN - USB-UART Video/Display: - HDMI Video OUT - 8X LEDs Control & I/O: - 3 User Push Buttons - 2 User Switches - 8 User LEDs For more info on zc702 board: - http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC702-G.htm ZC706-: APSOC: - XC7Z045 FFG900 -2 AP SoC Memory: - DDR3 Component Memory 1GB (PS) - DDR3 SODIM Memory 1GB (PL) - 2X16MB Quad SPI Flash (dual parallel) - IIC - 1 KB EEPROM Connectivity: - PCIe Gen2x4 - SFP+ and SMA Pairs - GigE RGMII Ethernet (PS) - USB OTG 1 (PS) - Host USB - IIC Bus Headers/HUB (PS) - 1 CAN with Wake on CAN (PS) - USB-UART Video/Display: - HDMI 8 color RGB 4.4.4 1080P-60 OUT - HDMI IN 8 color RGB 4.4.4 Control & I/O: - 2 User Push Buttons/Dip Switch, 2 User LEDs - IIC access to GPIO - SDIO (SD Card slot) - 3 User Push Buttons, 2 User Switches, 8 User LEDs For more info on zc706 board: - http://www.xilinx.com/products/boards-and-kits/EK-Z7-ZC706-G.htm Signed-off-by: Jagannadha Sutradharudu Teki --- V2: Updated domain name in mail ids' boards.cfg | 1 + include/configs/zynq-common.h | 9 --------- include/configs/zynq_zc70x.h | 26 ++++++++++++++++++++++++++ 3 files changed, 27 insertions(+), 9 deletions(-) create mode 100644 include/configs/zynq_zc70x.h diff --git a/boards.cfg b/boards.cfg index 570d141..9f0374f 100644 --- a/boards.cfg +++ b/boards.cfg @@ -354,6 +354,7 @@ Active arm armv7 socfpga altera socfpga Active arm armv7 u8500 st-ericsson snowball snowball - Mathieu Poirier Active arm armv7 u8500 st-ericsson u8500 u8500_href - - Active arm armv7 vf610 freescale vf610twr vf610twr vf610twr:IMX_CONFIG=board/freescale/vf610twr/imximage.cfg Alison Wang +Active arm armv7 zynq xilinx zynq zynq_zc70x - Michal Simek :Jagannadha Sutradharudu Teki Active arm armv7:arm720t tegra114 nvidia dalmore dalmore - Tom Warren Active arm armv7:arm720t tegra20 avionic-design medcom-wide medcom-wide - Thierry Reding Active arm armv7:arm720t tegra20 avionic-design plutux plutux - Thierry Reding diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h index e6990ea..4896232 100644 --- a/include/configs/zynq-common.h +++ b/include/configs/zynq-common.h @@ -36,7 +36,6 @@ {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400} /* Zynq Serial driver */ -#define CONFIG_ZYNQ_SERIAL_UART1 #ifdef CONFIG_ZYNQ_SERIAL_UART0 # define CONFIG_ZYNQ_SERIAL_BASEADDR0 0xE0000000 # define CONFIG_ZYNQ_SERIAL_BAUDRATE0 CONFIG_BAUDRATE @@ -60,8 +59,6 @@ #endif /* Ethernet driver */ -#define CONFIG_ZYNQ_GEM0 -#define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 #if defined(CONFIG_ZYNQ_GEM0) || defined(CONFIG_ZYNQ_GEM1) # define CONFIG_NET_MULTI # define CONFIG_ZYNQ_GEM @@ -71,7 +68,6 @@ # define CONFIG_PHY_MARVELL #endif -#define CONFIG_ZYNQ_SPI /* SPI */ #ifdef CONFIG_ZYNQ_SPI # define CONFIG_SPI_FLASH @@ -89,10 +85,6 @@ # define CONFIG_SPI_FLASH_WINBOND #endif -/* NOR */ -#define CONFIG_SYS_NO_FLASH - -#define CONFIG_ZYNQ_SDHCI0 /* MMC */ #if defined(CONFIG_ZYNQ_SDHCI0) || defined(CONFIG_ZYNQ_SDHCI1) # define CONFIG_MMC @@ -106,7 +98,6 @@ # define CONFIG_DOS_PARTITION #endif -#define CONFIG_ZYNQ_I2C0 /* I2C */ #if defined(CONFIG_ZYNQ_I2C0) || defined(CONFIG_ZYNQ_I2C1) # define CONFIG_CMD_I2C diff --git a/include/configs/zynq_zc70x.h b/include/configs/zynq_zc70x.h new file mode 100644 index 0000000..559cd19 --- /dev/null +++ b/include/configs/zynq_zc70x.h @@ -0,0 +1,26 @@ +/* + * (C) Copyright 2013 Xilinx, Inc. + * + * Configuration settings for the Xilinx Zynq ZC702 and ZC706 boards + * See zynq_common.h for Zynq common configs + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __CONFIG_ZYNQ_ZC70X_H +#define __CONFIG_ZYNQ_ZC70X_H + +#define CONFIG_ZYNQ_SERIAL_UART1 +#define CONFIG_ZYNQ_GEM0 +#define CONFIG_ZYNQ_GEM_PHY_ADDR0 7 + +#define CONFIG_SYS_NO_FLASH + +#define CONFIG_ZYNQ_QSPI +#define CONFIG_ZYNQ_SDHCI0 +#define CONFIG_ZYNQ_I2C0 +#define CONFIG_ZYNQ_BOOT_FREEBSD + +#include + +#endif /* __CONFIG_ZYNQ_ZC70X_H */