diff mbox series

[v2,4/5] arm: dts: stm32mp157c-odyssey-som: enable the SDMMC2 eMMC HS DDR mode

Message ID bc5e2aaf93fab7d50203752d99279725c3c94ef5.1622651232.git.gszymaszek@short.pl
State Accepted
Commit 7db3307848f2d4734861fda45320345e688ccdac
Delegated to: Patrice Chotard
Headers show
Series arm: dts: stm32mp157c-odyssey-som: sync SDMMC2 with Linux and TF‑A | expand

Commit Message

Grzegorz Szymaszek June 2, 2021, 5:09 p.m. UTC
Enable the SDMMC2 eMMC high-speed DDR mode as it is done in the
corresponding Linux kernel device tree.

Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
Cc: Patrice Chotard <patrice.chotard@foss.st.com>
Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
---
Changes for v2:
   - rebased on current master
   - added a short commit message body

 arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 1 +
 1 file changed, 1 insertion(+)

Comments

Patrice CHOTARD June 3, 2021, 7:35 a.m. UTC | #1
Hi Grzegorz

On 6/2/21 7:09 PM, Grzegorz Szymaszek wrote:
> Enable the SDMMC2 eMMC high-speed DDR mode as it is done in the
> corresponding Linux kernel device tree.
> 
> Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
> Cc: Patrice Chotard <patrice.chotard@foss.st.com>
> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
> ---
> Changes for v2:
>    - rebased on current master
>    - added a short commit message body
> 
>  arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
> index 583812f137..1510a5b364 100644
> --- a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
> +++ b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
> @@ -274,6 +274,7 @@
>  	bus-width = <8>;
>  	vmmc-supply = <&v3v3>;
>  	vqmmc-supply = <&vdd>;
> +	mmc-ddr-3_3v;
>  	status = "okay";
>  };
>  
> 

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>

Thanks
Patrice
Patrice CHOTARD June 18, 2021, 8 a.m. UTC | #2
On 6/3/21 9:35 AM, Patrice CHOTARD wrote:
> Hi Grzegorz
> 
> On 6/2/21 7:09 PM, Grzegorz Szymaszek wrote:
>> Enable the SDMMC2 eMMC high-speed DDR mode as it is done in the
>> corresponding Linux kernel device tree.
>>
>> Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
>> Cc: Patrice Chotard <patrice.chotard@foss.st.com>
>> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
>> ---
>> Changes for v2:
>>    - rebased on current master
>>    - added a short commit message body
>>
>>  arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
>> index 583812f137..1510a5b364 100644
>> --- a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
>> +++ b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
>> @@ -274,6 +274,7 @@
>>  	bus-width = <8>;
>>  	vmmc-supply = <&v3v3>;
>>  	vqmmc-supply = <&vdd>;
>> +	mmc-ddr-3_3v;
>>  	status = "okay";
>>  };
>>  
>>
> 
> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
> 
> Thanks
> Patrice
> _______________________________________________
> Uboot-stm32 mailing list
> Uboot-stm32@st-md-mailman.stormreply.com
> https://st-md-mailman.stormreply.com/mailman/listinfo/uboot-stm32
> 
Applied on u-boot-stm32/next

Thanks
Patrice CHOTARD June 18, 2021, 8 a.m. UTC | #3
On 6/3/21 9:35 AM, Patrice CHOTARD wrote:
> Hi Grzegorz
> 
> On 6/2/21 7:09 PM, Grzegorz Szymaszek wrote:
>> Enable the SDMMC2 eMMC high-speed DDR mode as it is done in the
>> corresponding Linux kernel device tree.
>>
>> Signed-off-by: Grzegorz Szymaszek <gszymaszek@short.pl>
>> Cc: Patrice Chotard <patrice.chotard@foss.st.com>
>> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com>
>> ---
>> Changes for v2:
>>    - rebased on current master
>>    - added a short commit message body
>>
>>  arch/arm/dts/stm32mp157c-odyssey-som.dtsi | 1 +
>>  1 file changed, 1 insertion(+)
>>
>> diff --git a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
>> index 583812f137..1510a5b364 100644
>> --- a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
>> +++ b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
>> @@ -274,6 +274,7 @@
>>  	bus-width = <8>;
>>  	vmmc-supply = <&v3v3>;
>>  	vqmmc-supply = <&vdd>;
>> +	mmc-ddr-3_3v;
>>  	status = "okay";
>>  };
>>  
>>
> 
> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
> 
> Thanks
> Patrice
> 
Applied on u-boot-stm32/next

Thanks
diff mbox series

Patch

diff --git a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
index 583812f137..1510a5b364 100644
--- a/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
+++ b/arch/arm/dts/stm32mp157c-odyssey-som.dtsi
@@ -274,6 +274,7 @@ 
 	bus-width = <8>;
 	vmmc-supply = <&v3v3>;
 	vqmmc-supply = <&vdd>;
+	mmc-ddr-3_3v;
 	status = "okay";
 };