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[106.168.128.197]) by smtp.gmail.com with ESMTPSA id h9-20020a170902704900b001d05456394csm2590661plt.28.2023.12.21.21.46.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Dec 2023 21:46:50 -0800 (PST) From: tkuw584924@gmail.com X-Google-Original-From: Takahiro.Kuwano@infineon.com To: u-boot@lists.denx.de Cc: jagan@amarulasolutions.com, vigneshr@ti.com, tudor.ambarus@linaro.org, pratyush@kernel.org, d-gole@ti.com, tkuw584924@gmail.com, Bacem.Daassi@infineon.com, Takahiro Kuwano Subject: [PATCH v2 6/9] mtd: spi-nor-core: Consolidate setup() hook for Infineon(Cypress) S25 and S28 Date: Fri, 22 Dec 2023 14:46:03 +0900 Message-Id: X-Mailer: git-send-email 2.34.1 In-Reply-To: References: MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Takahiro Kuwano s28hx_t_setup() only checks sector layout setting. To support multi-die package parts like S28HS02GT, it needs to check device size and assign ready() hook for multi-die package parts. These are covered in s25_setup() so we can consolidate s28hx_t_setup() and s25_setup() into one named s25_s28_setup(). spi_nor_wait_till_ready() at the beginning of s28hx_t_setup() can be removed since there is no op that makes device busy state before setup. Signed-off-by: Takahiro Kuwano Reviewed-by: Jagan Teki --- drivers/mtd/spi/spi-nor-core.c | 41 ++++------------------------------ 1 file changed, 4 insertions(+), 37 deletions(-) diff --git a/drivers/mtd/spi/spi-nor-core.c b/drivers/mtd/spi/spi-nor-core.c index fe5579db4d..0bc43d3d21 100644 --- a/drivers/mtd/spi/spi-nor-core.c +++ b/drivers/mtd/spi/spi-nor-core.c @@ -3375,8 +3375,8 @@ static int s25_s28_erase_non_uniform(struct spi_nor *nor, loff_t addr) SZ_128K); } -static int s25_setup(struct spi_nor *nor, const struct flash_info *info, - const struct spi_nor_flash_parameter *params) +static int s25_s28_setup(struct spi_nor *nor, const struct flash_info *info, + const struct spi_nor_flash_parameter *params) { int ret; u8 cr; @@ -3423,7 +3423,7 @@ static int s25_setup(struct spi_nor *nor, const struct flash_info *info, static void s25_default_init(struct spi_nor *nor) { - nor->setup = s25_setup; + nor->setup = s25_s28_setup; } static int s25_post_bfpt_fixup(struct spi_nor *nor, @@ -3582,43 +3582,10 @@ static int spi_nor_cypress_octal_dtr_enable(struct spi_nor *nor) return 0; } -static int s28hx_t_setup(struct spi_nor *nor, const struct flash_info *info, - const struct spi_nor_flash_parameter *params) -{ - struct spi_mem_op op; - u8 buf; - u8 addr_width = 3; - int ret; - - ret = spi_nor_wait_till_ready(nor); - if (ret) - return ret; - - /* - * Check CFR3V to check if non-uniform sector mode is selected. If it - * is, set the erase hook to the non-uniform erase procedure. - */ - op = (struct spi_mem_op) - SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RD_ANY_REG, 1), - SPI_MEM_OP_ADDR(addr_width, - SPINOR_REG_CYPRESS_CFR3V, 1), - SPI_MEM_OP_NO_DUMMY, - SPI_MEM_OP_DATA_IN(1, &buf, 1)); - - ret = spi_mem_exec_op(nor->spi, &op); - if (ret) - return ret; - - if (!(buf & SPINOR_REG_CYPRESS_CFR3_UNISECT)) - nor->erase = s25_s28_erase_non_uniform; - - return spi_nor_default_setup(nor, info, params); -} - static void s28hx_t_default_init(struct spi_nor *nor) { nor->octal_dtr_enable = spi_nor_cypress_octal_dtr_enable; - nor->setup = s28hx_t_setup; + nor->setup = s25_s28_setup; } static void s28hx_t_post_sfdp_fixup(struct spi_nor *nor,