From patchwork Sat Jun 12 17:16:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tianrui Wei X-Patchwork-Id: 1491314 X-Patchwork-Delegate: uboot@andestech.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=outlook.com header.i=@outlook.com header.a=rsa-sha256 header.s=selector1 header.b=HAD/0fCS; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4G2PY34JZYz9sjB for ; Sun, 13 Jun 2021 03:17:43 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 075E180C92; Sat, 12 Jun 2021 19:17:26 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=outlook.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=outlook.com header.i=@outlook.com header.b="HAD/0fCS"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id BF96280C72; Sat, 12 Jun 2021 19:17:24 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FORGED_SPF_HELO,FREEMAIL_FROM, MSGID_FROM_MTA_HEADER,SPF_HELO_PASS autolearn=no autolearn_force=no version=3.4.2 Received: from APC01-HK2-obe.outbound.protection.outlook.com (mail-hk2apc01olkn0805.outbound.protection.outlook.com [IPv6:2a01:111:f400:febc::805]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 69E5380A22 for ; Sat, 12 Jun 2021 19:17:21 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=outlook.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=tianrui-wei@outlook.com ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=VDchYf0YnvzPWLt3qD6l3Ztk9PKWPETUyw9Y6XJUafwEG2TyLzE0R8dQaQpwfbhulRkF7L8CbnstfES3bGyWNKwqbLBFUODQ/QIUjxQKZfPK4P7gXBeezzjU2f2kHRsW2zsmdK72UQrq1EgGX0sEeDS/SwhqxkwXckAxC6un67FuleJFzdbkqU1eUMcN6u59WuZEoGd/qP6NpBuMuf5s0iwkqJ1cRb5EECb2ZhLKguseYRhvMMy4DkU3+MIQrIFoILAHE3q0VdUeoms8Sbng0x7sRVJ2n5fmNgKgvQug5olo64WB7CeObyaIoWZuNgQHSsSzAw5VuworxxKXSY/D0A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=ZpAz1bXnyJ26k+BPYiNiRnYUNF8DEc8RrE0NlSPCa3Y=; b=g3jFb6o/x9TrvKD52ohZ8zAVE3+nmQPJ2IOTA1PmfI6PHTLkQepJHUoQzLdqIcs5g8AERDjgaGTUtYlrlMOkRHXLMeNi3b3J1XxZmxQUJGjL06oBWdMr55L/8g8z63rxr44fqtrN1cvAbh4bDwymviUCPjLbgpOTwvYeRzCwdgkhrlZAb+axDI4FEXWo2kmIe0MDiDSNqtD0OirDxT9EtmZqBqhe8F6qN0721579mKK+EcTqR7M7Qth57uzJB6gUQ91vpLXj4vYPl9ukiXGK9od/o5CscJEBdW8LDRgAjFCQZ699iX3MLdZv4wuLXaDoIlzy4pF4w9B3qX2Q0He92g== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=none; dmarc=none; dkim=none; arc=none DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=outlook.com; s=selector1; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=ZpAz1bXnyJ26k+BPYiNiRnYUNF8DEc8RrE0NlSPCa3Y=; b=HAD/0fCSV3hs1wsXWlmnXRdsK39zoH2ZeHGOVSBPOIkSYgoZDJ8SPB+aGTtz3fk5ozhp4iEXvfgEdq3FtzgEzCu+W2F3gCWLqqp5No6SxjrCw6npgAqX100cAxpCgSfTbJl/eHT4W5VDUjKBQh2/jDgsNgGTS9g+Yn0qMpPr9OT7rIGQjtgJ9C13CA4RPrBuo0bNWb7OMugqz4/6cN8Yy5mUSrw/EFqIs/tyzlVV2F5M0wlcUyCtHm3DtDS/sd84RB2JAC0JZ83Ym5rD2Z5ncxwQvkyydGzSn4CYSaHD+vN9doYMu/Qq4szBAeRIkfS7aqF8Ax5ER9UAtw0FilwRFQ== Received: from SG2PR06CA0215.apcprd06.prod.outlook.com (2603:1096:4:68::23) by TY2PR03MB4016.apcprd03.prod.outlook.com (2603:1096:404:b8::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4242.10; Sat, 12 Jun 2021 17:17:07 +0000 Received: from SG2APC01FT039.eop-APC01.prod.protection.outlook.com (2603:1096:4:68:cafe::2c) by SG2PR06CA0215.outlook.office365.com (2603:1096:4:68::23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4219.20 via Frontend Transport; Sat, 12 Jun 2021 17:17:07 +0000 Received: from SY4PR01MB6798.ausprd01.prod.outlook.com (2a01:111:e400:7ebd::47) by SG2APC01FT039.mail.protection.outlook.com (2a01:111:e400:7ebd::268) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4219.21 via Frontend Transport; Sat, 12 Jun 2021 17:17:06 +0000 X-IncomingTopHeaderMarker: OriginalChecksum:B46C4A9CD7F23162BB268DBC991BE9674B6D3C723F07D01B3F03597AE4B5E3F9; UpperCasedChecksum:55537862E3274A4A68FB7BA028BE719423CE31389DDD08780AFB4D13EFDF8B2B; SizeAsReceived:7539; Count:47 Received: from SY4PR01MB6798.ausprd01.prod.outlook.com ([fe80::5476:5394:7bb7:6941]) by SY4PR01MB6798.ausprd01.prod.outlook.com ([fe80::5476:5394:7bb7:6941%2]) with mapi id 15.20.4219.025; Sat, 12 Jun 2021 17:17:06 +0000 From: Tianrui Wei To: u-boot@lists.denx.de Cc: ycliang@andestech.com, rick@andestech.com, peng.fan@nxp.com, jh80.chung@samsung.com, jbalkind@ucsb.edu, seanga2@gmail.com, bmeng.cn@gmail.com Subject: [RESEND PATCH v6 2/2] mmc: openpiton: add piton_mmc driver Date: Sun, 13 Jun 2021 01:16:50 +0800 Message-ID: X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210612171650.7247-1-tianrui-wei@outlook.com> References: <20210612171650.7247-1-tianrui-wei@outlook.com> X-TMN: [pudrKJ900plXMa7h15GFrfrWAVQ6g0SY] X-ClientProxiedBy: HK2PR04CA0049.apcprd04.prod.outlook.com (2603:1096:202:14::17) To SY4PR01MB6798.ausprd01.prod.outlook.com (2603:10c6:10:137::12) X-Microsoft-Original-Message-ID: <20210612171650.7247-3-tianrui-wei@outlook.com> MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from eva-virtual-machine.localdomain (180.160.51.170) by HK2PR04CA0049.apcprd04.prod.outlook.com (2603:1096:202:14::17) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.4219.21 via Frontend Transport; Sat, 12 Jun 2021 17:17:04 +0000 X-MS-PublicTrafficType: Email X-IncomingHeaderCount: 47 X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-Correlation-Id: f8657e77-6129-4935-f8ee-08d92dc5e772 X-MS-TrafficTypeDiagnostic: TY2PR03MB4016: X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: xN7i0GkX+kG3Eoh/89DTvXWqvW4ZAAt/V8bb+ciHtfP5GhIs0CG3fGCV9JQWBhtPGbnaPL2Ev4P4Jeqq3NfX4iBzSToz1HLt7nSUj6J/cJJAEniyaOJVnoSKyTPNi0K3l80ju9AFucLDVuHcTwWsRKkvn7WI0TnsP1GCu2EL/cM2RP1gROTRItibQyXT/atb/X1OUIaOPjYyOF4xeiJ0LCKY58b6wR2SxHsuCARZ6hbpyBnDdK5omfwmSctPrqQ3kh46O3QZk6o5A33cyOTRyDCDsUwYzlDiSGt1vbHHkRXtuaYFMGOsqMdZH2O+ar6Nps3oUdr3StwkqWiP7aGSdo4S8vWGqXMDmoRubXpAipGwzM05qpNb92E081CEKStHpjlrro7uJUGeavdkfHEPJw== X-MS-Exchange-AntiSpam-MessageData: m/Wqvrge++9k6jp6dS99XEnxvLVv6J6SGEWWAp1xGU2VFy+wgQjIKeQpw086RNUwMFieXkZYH1dYoF7+bkCkaX7fDP04AQkjy6nN3L4KRjGhzV9LnWiT8ueXwjdqHEmH803dxoOmezRbqsTrKh3Tdw== X-OriginatorOrg: outlook.com X-MS-Exchange-CrossTenant-Network-Message-Id: f8657e77-6129-4935-f8ee-08d92dc5e772 X-MS-Exchange-CrossTenant-OriginalArrivalTime: 12 Jun 2021 17:17:06.8099 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 84df9e7f-e9f6-40af-b435-aaaaaaaaaaaa X-MS-Exchange-CrossTenant-AuthSource: SG2APC01FT039.eop-APC01.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: Internet X-MS-Exchange-CrossTenant-RMS-PersistedConsumerOrg: 00000000-0000-0000-0000-000000000000 X-MS-Exchange-Transport-CrossTenantHeadersStamped: TY2PR03MB4016 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean This commit adds support to piton_mmc driver for OpenPiton-riscv64 In particular, this driver - V6 . change type of address . move declarations ahead . loop style update Signed-off-by: Tianrui Wei Signed-off-by: Jonathan Balkind --- drivers/mmc/Kconfig | 9 +++ drivers/mmc/Makefile | 1 + drivers/mmc/piton_mmc.c | 169 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 179 insertions(+) create mode 100644 drivers/mmc/piton_mmc.c diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig index 8901456967..096d6a930c 100644 --- a/drivers/mmc/Kconfig +++ b/drivers/mmc/Kconfig @@ -727,6 +727,15 @@ config MMC_SUNXI_HAS_MODE_SWITCH bool depends on MMC_SUNXI +config MMC_PITON + bool "MMC support for OpenPiton SoC" + depends on DM_MMC && BLK + help + This selects support for the SD host controller on + OpenPiton SoC. Note that this SD controller directly + exposes the contents of the SD card as memory mapped, + so there is no manual configuration required + config GENERIC_ATMEL_MCI bool "Atmel Multimedia Card Interface support" depends on DM_MMC && BLK && ARCH_AT91 diff --git a/drivers/mmc/Makefile b/drivers/mmc/Makefile index 89d6af3db3..cc08b41d0d 100644 --- a/drivers/mmc/Makefile +++ b/drivers/mmc/Makefile @@ -72,6 +72,7 @@ obj-$(CONFIG_MMC_SDHCI_XENON) += xenon_sdhci.o obj-$(CONFIG_MMC_SDHCI_ZYNQ) += zynq_sdhci.o obj-$(CONFIG_MMC_SUNXI) += sunxi_mmc.o +obj-$(CONFIG_MMC_PITON) += piton_mmc.o obj-$(CONFIG_MMC_UNIPHIER) += tmio-common.o uniphier-sd.o obj-$(CONFIG_RENESAS_SDHI) += tmio-common.o renesas-sdhi.o obj-$(CONFIG_MMC_BCM2835) += bcm2835_sdhost.o diff --git a/drivers/mmc/piton_mmc.c b/drivers/mmc/piton_mmc.c new file mode 100644 index 0000000000..32671d1a89 --- /dev/null +++ b/drivers/mmc/piton_mmc.c @@ -0,0 +1,169 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2009 SAMSUNG Electronics + * Minkyu Kang + * Jaehoon Chung + * Portions Copyright 2011-2019 NVIDIA Corporation + * Portions Copyright 2021 Tianrui Wei + * This file is adapted from tegra_mmc.c + * Tianrui Wei + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct piton_mmc_plat { + struct mmc_config cfg; + struct mmc mmc; +}; + +struct piton_mmc_priv { + void __iomem *piton_mmc_base_addr; /* peripheral id */ +}; + +/* + * see mmc_read_blocks to see how it is used. + * start block is hidden at cmd->arg + * also, initialize the block size at init + */ +static int piton_mmc_send_cmd(struct udevice *dev, struct mmc_cmd *cmd, + struct mmc_data *data) +{ + /* check first if this is a pure command */ + if (!data) + return 0; + + struct piton_mmc_priv *priv = dev_get_priv(dev); + u32 *buff, *start_addr; + size_t byte_cnt, start_block; + + buff = (u32 *)data->dest; + start_block = cmd->cmdarg; + start_addr = priv->piton_mmc_base_addr + start_block; + + /* if there is a read */ + if (data->flags & MMC_DATA_READ) { + for (byte_cnt = data->blocks * data->blocksize; byte_cnt; + byte_cnt -= sizeof(u32)) { + *buff++ = readl(start_addr++); + } + } else { + return -ENOSYS; + } + + return 0; +} + +static int piton_mmc_ofdata_to_platdata(struct udevice *dev) +{ + struct piton_mmc_priv *priv = dev_get_priv(dev); + struct piton_mmc_plat *plat = dev_get_platdata(dev); + struct mmc_config *cfg; + struct mmc *mmc; + /* fill in device description */ + struct blk_desc *bdesc; + + priv->piton_mmc_base_addr = (void *)dev_read_addr(dev); + cfg = &plat->cfg; + cfg->name = "PITON MMC"; + cfg->host_caps = MMC_MODE_8BIT; + cfg->f_max = 100000; + cfg->f_min = 400000; + cfg->voltages = MMC_VDD_21_22; + + mmc = &plat->mmc; + mmc->read_bl_len = MMC_MAX_BLOCK_LEN; + mmc->capacity_user = 0x100000000; + mmc->capacity_user *= mmc->read_bl_len; + mmc->capacity_boot = 0; + mmc->capacity_rpmb = 0; + for (int i = 0; i < 4; i++) + mmc->capacity_gp[i] = 0; + mmc->capacity = 0x2000000000ULL; + mmc->has_init = 1; + + bdesc = mmc_get_blk_desc(mmc); + bdesc->lun = 0; + bdesc->hwpart = 0; + bdesc->type = 0; + bdesc->blksz = mmc->read_bl_len; + bdesc->log2blksz = LOG2(bdesc->blksz); + bdesc->lba = lldiv(mmc->capacity, mmc->read_bl_len); + + return 0; +} + +/* test if the micro sd card is present + * always return 1, which means present + */ +static int piton_mmc_getcd(struct udevice *dev) +{ + /* + * always return 1 + */ + return 1; +} + +/* dummy function, piton_mmc don't need initialization + * in hw + */ +static const struct dm_mmc_ops piton_mmc_ops = { + .send_cmd = piton_mmc_send_cmd, + .get_cd = piton_mmc_getcd, +}; + +static int piton_mmc_probe(struct udevice *dev) +{ + struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); + struct piton_mmc_plat *plat = dev_get_platdata(dev); + struct mmc_config *cfg = &plat->cfg; + + cfg->name = dev->name; + upriv->mmc = &plat->mmc; + upriv->mmc->has_init = 1; + upriv->mmc->capacity = 0x2000000000ULL; + upriv->mmc->read_bl_len = MMC_MAX_BLOCK_LEN; + return 0; +} + +static int piton_mmc_bind(struct udevice *dev) +{ + struct piton_mmc_plat *plat = dev_get_platdata(dev); + struct mmc_config *cfg = &plat->cfg; + + cfg->name = dev->name; + cfg->host_caps = MMC_MODE_HS_52MHz | MMC_MODE_HS | MMC_MODE_8BIT; + cfg->voltages = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34; + cfg->f_min = 1000000; + cfg->f_max = 52000000; + cfg->b_max = U32_MAX; + + return mmc_bind(dev, &plat->mmc, cfg); +} + +static const struct udevice_id piton_mmc_ids[] = { + {.compatible = "openpiton,piton-mmc"}, + {/* sentinel */} +}; + +U_BOOT_DRIVER(piton_mmc_drv) = { + .name = "piton_mmc", + .id = UCLASS_MMC, + .of_match = piton_mmc_ids, + .ofdata_to_platdata = piton_mmc_ofdata_to_platdata, + .bind = piton_mmc_bind, + .probe = piton_mmc_probe, + .ops = &piton_mmc_ops, + .platdata_auto_alloc_size = sizeof(struct piton_mmc_plat), + .priv_auto_alloc_size = sizeof(struct piton_mmc_priv), +};