diff mbox series

clk: rockchip: rk3399: Add SCLK_UART4_PMU support

Message ID PH7P222MB066847DC525C783560A6B5AADD3E2@PH7P222MB0668.NAMP222.PROD.OUTLOOK.COM
State New
Delegated to: Kever Yang
Headers show
Series clk: rockchip: rk3399: Add SCLK_UART4_PMU support | expand

Commit Message

xiaofengvskuye April 2, 2024, 10:02 a.m. UTC 
The SCLK_UART4_PMU clocks is used as reference clock for UART4 block.

Add simple support to get rate of SCLK_UART4_PMU clocks to fix
reference clock period configuration.

Signed-off-by: xiaofengvskuye <xiaofengvskuye@hotmail.com>
---
 drivers/clk/rockchip/clk_rk3399.c | 3 +++
 1 file changed, 3 insertions(+)
diff mbox series

Patch

diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c
index c37e8a53a2..41eb13533a 100644
--- a/drivers/clk/rockchip/clk_rk3399.c
+++ b/drivers/clk/rockchip/clk_rk3399.c
@@ -1563,6 +1563,9 @@  static ulong rk3399_pmuclk_get_rate(struct clk *clk)
 	case SCLK_I2C8_PMU:
 		rate = rk3399_i2c_get_pmuclk(priv->pmucru, clk->id);
 		break;
+    case SCLK_UART4_PMU:
+		return 24000000;
+        break;
 	default:
 		return -ENOENT;
 	}