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Pull request: SoCFPGA changes for u-boot-socfpga-next-20250422

Message ID LV8PR03MB81371BBB1BF844425EB2DDC0A7BB2@LV8PR03MB8137.namprd03.prod.outlook.com
State Accepted
Headers show
Series Pull request: SoCFPGA changes for u-boot-socfpga-next-20250422 | expand

Pull-request

https://source.denx.de/u-boot/custodians/u-boot-socfpga.git tags/u-boot-socfpga-next-20250422

Message

Chee, Tien Fong April 22, 2025, 5:11 a.m. UTC 
Dear Tom,

This pull request contains updates for the SoCFPGA platform, targeting the 2025.07 release cycle. Highlights include enhancements to Agilex5 support, improvements in DDR error handling, and bridge reset handling for SoC64 devices.

Key updates:

Agilex5 platform enhancements:


  *   New MMU region mappings and memory layout updates using LMB_ARCH_MEM_MAP.


  *   Fixes for bloblist configuration, kernel FIT image generation, and VAB flow enablement.


  *   GPIO pin control added for SDIO selection.


  *   Marvell PHY driver enabled in defconfig.

Agilex5 / SoC64 DDR subsystem:


  *   Added ECC debug improvements for IOSSM.


  *   Introduced LPDDR inline ECC support.


  *   Resolved size calculation overflow in memory driver.

SoC64 improvements:


  *   Enhanced mailbox communication with the SDM to reflect various boot stage transitions.


  *   Implemented F2S bridge reset support and updated related reset manager registers.


  *   Expanded SoC64 CPU info reporting.

General maintenance:


  *   Additional peripherals released from reset for Arria10.


  *   Cleanup of legacy or incorrect Kconfig implications.




This patch set has been tested on Agilex 5 devkit.



Passing all pipeline tests at SoCFPGA U-boot custodian https://source.denx.de/u-boot/custodians/u-boot-socfpga/-/pipelines/25867<https://source.denx.de/u-boot/custodians/u-boot-socfpga/-/pipelines/24816> .

Thanks.

Best regards,
Tien Fong

The following changes since commit cde0050618968aae335dfbc930641656d51ff5d0:

  Merge tag 'u-boot-at91-2025.07-b' of https://source.denx.de/u-boot/custodians/u-boot-at91 (2025-04-21 08:24:54 -0600)

are available in the Git repository at:

  https://source.denx.de/u-boot/custodians/u-boot-socfpga.git tags/u-boot-socfpga-next-20250422

for you to fetch changes up to 0415429935d7e19595d2997ee08415d0d8052d4d:

  ddr: altera: iossm: Enhance debug information for ECC errors (2025-04-22 11:47:41 +0800)

----------------------------------------------------------------
Alif Zakuan Yuslaimi (7):
      arm: socfpga: mailbox: Notify SDM on HPS code execution stages
      arm: socfpga: soc64: Update reset manager registers for F2S bridge
      arm: socfpga: soc64: Enable F2S bridge reset support
      arm: socfpga: spl: Notify SDM on FSBL execution
      configs: agilex5: Enable Marvell PHY driver
      arch: arm: dts: agilex5: Set SDIO_SEL GPIO pin as output
      arm: socfpga: soc64: Update SoC64 CPU info

Naresh Kumar Ravulapalli (4):
      drivers: ddr: altera: Fix integer overflow during size calculation
      reset: socfpga: release more A10 peripherals out of reset
      arch: arm: dts: Enable kernel itb file generation for Agilex5 SoCFPGA
      configs: Enable VAB flow for Agilex5 SoCFPGA boards

Tingting Meng (6):
      configs: agilex5: Restore fixed bloblist
      arm: socfpga: agilex5: Add MMU mapping region
      arm: socfpga: socfpga_soc64: Enable LMB_ARCH_MEM_MAP
      arm: dts: agilex5: Update CCU configuration
      ddr: altera: agilex5: LPDDRs in-line ECC support
      ddr: altera: iossm: Enhance debug information for ECC errors

Tom Rini (1):
      ARM: socfpga: Drop incorrect imply SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION*

MAINTAINERS                                              |   1 +
arch/arm/Kconfig                                         |   3 +-
arch/arm/dts/socfpga_agilex5-u-boot.dtsi                 |  17 ++++-
arch/arm/dts/socfpga_agilex5_socdk-u-boot.dtsi           |  26 ++++---
arch/arm/dts/socfpga_soc64_fit-u-boot.dtsi               |   5 ++
arch/arm/mach-socfpga/Makefile                           |   2 +
arch/arm/mach-socfpga/board.c                            |  13 ++++
arch/arm/mach-socfpga/include/mach/base_addr_soc64.h     |   1 +
arch/arm/mach-socfpga/include/mach/mailbox_s10.h         |   4 ++
arch/arm/mach-socfpga/include/mach/reset_manager_soc64.h |  18 ++++-
arch/arm/mach-socfpga/mailbox_s10.c                      |  12 ++++
arch/arm/mach-socfpga/misc_soc64.c                       |   4 +-
arch/arm/mach-socfpga/mmu-arm64_s10.c                    |  14 ++++
arch/arm/mach-socfpga/reset_manager_s10.c                | 236 +++++++++++++++++++++++++++++++++++++++++++++++++++----------
arch/arm/mach-socfpga/spl_agilex.c                       |   6 +-
arch/arm/mach-socfpga/spl_agilex5.c                      |   6 +-
arch/arm/mach-socfpga/spl_n5x.c                          |   6 +-
arch/arm/mach-socfpga/spl_s10.c                          |   6 +-
configs/socfpga_agilex5_defconfig                        |   6 ++
configs/socfpga_agilex5_vab_defconfig                    |   3 +
drivers/ddr/altera/iossm_mailbox.c                       | 225 +++++++++++++++++++++++++++++++++++++++++++++++++++-------
drivers/ddr/altera/iossm_mailbox.h                       |  11 ++-
drivers/ddr/altera/sdram_agilex5.c                       |  19 ++---
drivers/ddr/altera/sdram_soc64.c                         |  54 +++++++++-----
drivers/reset/reset-socfpga.c                            |   3 +
include/linux/intel-smc.h                                |  15 ++--
26 files changed, 594 insertions(+), 122 deletions(-)
create mode 100644 configs/socfpga_agilex5_vab_defconfig

Comments

Tom Rini April 22, 2025, 6:26 p.m. UTC | #1 
On Tue, 22 Apr 2025 05:11:16 +0000, Chee, Tien Fong wrote:

> This pull request contains updates for the SoCFPGA platform, targeting the 2025.07 release cycle. Highlights include enhancements to Agilex5 support, improvements in DDR error handling, and bridge reset handling for SoC64 devices.
> 
> Key updates:
> 
> Agilex5 platform enhancements:
> 
> 
>   *   New MMU region mappings and memory layout updates using LMB_ARCH_MEM_MAP.
> 
> [...]

Merged into u-boot/master, thanks!