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[U-Boot] arm: socfpga: correctly reserve SRAM for boot counter

Message ID FD897F46D140444CAB8DC80B08F0742B01996BDC29@PFDE-MX11.EU.P-F.BIZ
State Superseded
Delegated to: Marek Vasut
Headers show
Series [U-Boot] arm: socfpga: correctly reserve SRAM for boot counter | expand

Commit Message

Simon Goldschmidt May 14, 2018, 8:58 p.m. UTC
Bootcounter for is1 and sr1500 boards somewhat relied on struct global data alignment gap
at the end of internal SRAM. Let's fix this by explicitly reserving some bytes.

Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>
---
 include/configs/socfpga_common.h | 6 +++++-
 include/configs/socfpga_is1.h    | 3 ++-
 include/configs/socfpga_sr1500.h | 3 ++-
 3 files changed, 9 insertions(+), 3 deletions(-)

Comments

Marek Vasut May 14, 2018, 9 p.m. UTC | #1
On 05/14/2018 10:58 PM, Goldschmidt Simon wrote:
> Bootcounter for is1 and sr1500 boards somewhat relied on struct global data alignment gap
> at the end of internal SRAM. Let's fix this by explicitly reserving some bytes.
> 
> Signed-off-by: Simon Goldschmidt <sgoldschmidt@de.pepperl-fuchs.com>

This should be reserved somewhere in the common memory reservation code.
That's what that code is there for IMO. Add a __weak function to reserve
more space if needed.

> ---
>  include/configs/socfpga_common.h | 6 +++++-
>  include/configs/socfpga_is1.h    | 3 ++-
>  include/configs/socfpga_sr1500.h | 3 ++-
>  3 files changed, 9 insertions(+), 3 deletions(-)
> 
> diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
> index 4de2aa7929..1934aea86d 100644
> --- a/include/configs/socfpga_common.h
> +++ b/include/configs/socfpga_common.h
> @@ -35,8 +35,12 @@
>  #define CONFIG_SYS_INIT_RAM_ADDR	0xFFE00000
>  #define CONFIG_SYS_INIT_RAM_SIZE	0x40000 /* 256KB */
>  #endif
> +/* Reserve bytes at the end of SRAM? */
> +#ifndef SOCFPGA_INIT_RAM_END_RESERVE
> +#define SOCFPGA_INIT_RAM_END_RESERVE	0
> +#endif
>  #define CONFIG_SYS_INIT_SP_OFFSET		\
> -	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
> +	(CONFIG_SYS_INIT_RAM_SIZE - SOCFPGA_INIT_RAM_END_RESERVE)
>  #define CONFIG_SYS_INIT_SP_ADDR			\
>  	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
>  
> diff --git a/include/configs/socfpga_is1.h b/include/configs/socfpga_is1.h
> index c233c208a5..b243fd29cd 100644
> --- a/include/configs/socfpga_is1.h
> +++ b/include/configs/socfpga_is1.h
> @@ -27,8 +27,9 @@
>  #include <configs/socfpga_common.h>
>  
>  /*
> - * Bootcounter
> + * Bootcounter (preserve the last 2 lwords for the boot-counter)
>   */
> +#define CONFIG_SYS_INIT_RAM_END_RESERVE	8
>  #define CONFIG_SYS_BOOTCOUNT_BE
>  
>  #endif	/* __CONFIG_SOCFPGA_IS1_H__ */
> diff --git a/include/configs/socfpga_sr1500.h b/include/configs/socfpga_sr1500.h
> index c835d23235..ff71712566 100644
> --- a/include/configs/socfpga_sr1500.h
> +++ b/include/configs/socfpga_sr1500.h
> @@ -26,8 +26,9 @@
>  #define CONFIG_SPI_N25Q256A_RESET
>  
>  /*
> - * Bootcounter
> + * Bootcounter (preserve the last 2 lwords for the boot-counter)
>   */
> +#define SOCFPGA_INIT_RAM_END_RESERVE	8
>  #define CONFIG_SYS_BOOTCOUNT_BE
>  
>  /* Environment setting for SPI flash */
>
diff mbox series

Patch

diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 4de2aa7929..1934aea86d 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -35,8 +35,12 @@ 
 #define CONFIG_SYS_INIT_RAM_ADDR	0xFFE00000
 #define CONFIG_SYS_INIT_RAM_SIZE	0x40000 /* 256KB */
 #endif
+/* Reserve bytes at the end of SRAM? */
+#ifndef SOCFPGA_INIT_RAM_END_RESERVE
+#define SOCFPGA_INIT_RAM_END_RESERVE	0
+#endif
 #define CONFIG_SYS_INIT_SP_OFFSET		\
-	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
+	(CONFIG_SYS_INIT_RAM_SIZE - SOCFPGA_INIT_RAM_END_RESERVE)
 #define CONFIG_SYS_INIT_SP_ADDR			\
 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
diff --git a/include/configs/socfpga_is1.h b/include/configs/socfpga_is1.h
index c233c208a5..b243fd29cd 100644
--- a/include/configs/socfpga_is1.h
+++ b/include/configs/socfpga_is1.h
@@ -27,8 +27,9 @@ 
 #include <configs/socfpga_common.h>
 
 /*
- * Bootcounter
+ * Bootcounter (preserve the last 2 lwords for the boot-counter)
  */
+#define CONFIG_SYS_INIT_RAM_END_RESERVE	8
 #define CONFIG_SYS_BOOTCOUNT_BE
 
 #endif	/* __CONFIG_SOCFPGA_IS1_H__ */
diff --git a/include/configs/socfpga_sr1500.h b/include/configs/socfpga_sr1500.h
index c835d23235..ff71712566 100644
--- a/include/configs/socfpga_sr1500.h
+++ b/include/configs/socfpga_sr1500.h
@@ -26,8 +26,9 @@ 
 #define CONFIG_SPI_N25Q256A_RESET
 
 /*
- * Bootcounter
+ * Bootcounter (preserve the last 2 lwords for the boot-counter)
  */
+#define SOCFPGA_INIT_RAM_END_RESERVE	8
 #define CONFIG_SYS_BOOTCOUNT_BE
 
 /* Environment setting for SPI flash */