| Message ID | DM8PR11MB5592C795B82E1DFCC8A6122CD2C69@DM8PR11MB5592.namprd11.prod.outlook.com |
|---|---|
| State | Accepted |
| Delegated to: | Tom Rini |
| Headers | show
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Wed, 25 Aug 2021 11:15:08 +0000 From: "Chee, Tien Fong" <tien.fong.chee@intel.com> To: Tom Rini <trini@konsulko.com> CC: "u-boot@lists.denx.de" <u-boot@lists.denx.de>, Marek Vasut <marex@denx.de>, "\"Simon Goldschmidt\"" <simon.k.r.goldschmidt@gmail.com>, "Westergreen, Dalon" <dalon.westergreen@intel.com>, "Gan, Yau Wai" <yau.wai.gan@intel.com>, "Hea, Kok Kiang" <kok.kiang.hea@intel.com>, "Lim, Elly Siew Chin" <elly.siew.chin.lim@intel.com> Subject: Pull request: SoCFPGA changes for efi-2021-10-rc3 Thread-Topic: Pull request: SoCFPGA changes for efi-2021-10-rc3 Thread-Index: AdeZnIce8UXYEOPHTTa8EHY4fGC8pA== Date: Wed, 25 Aug 2021 11:15:08 +0000 Message-ID: <DM8PR11MB5592C795B82E1DFCC8A6122CD2C69@DM8PR11MB5592.namprd11.prod.outlook.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: dlp-reaction: no-action dlp-version: 11.5.1.3 dlp-product: dlpe-windows authentication-results: konsulko.com; dkim=none (message not signed) header.d=none;konsulko.com; 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Pull request: SoCFPGA changes for efi-2021-10-rc3
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On Wed, Aug 25, 2021 at 11:15:08AM +0000, Chee, Tien Fong wrote: > Hi Tom > > Please pull the SoCFPGA changes for efi-2021-10-rc3. > > Regards > Tien Fong > > The following changes since commit 4865db07169126ca0205f1a6265adf01bd69b3df: > > Merge tag 'efi-2021-10-rc3' of https://source.denx.de/u-boot/custodians/u-boot-efi (2021-08-23 12:44:12 -0400) > > are available in the Git repository at: > > https://github.com/tienfong/uboot_mainline.git next-socfpga > > for you to fetch changes up to 31b51cb1d2b4114085cb5565502d39d6f6daa2a7: > > arm: socfpga: Enable Intel N5X device build (2021-08-25 15:26:38 +0800) > Applied to u-boot/master, thanks!
Hi Tom Please pull the SoCFPGA changes for efi-2021-10-rc3. Regards Tien Fong The following changes since commit 4865db07169126ca0205f1a6265adf01bd69b3df: Merge tag 'efi-2021-10-rc3' of https://source.denx.de/u-boot/custodians/u-boot-efi (2021-08-23 12:44:12 -0400) are available in the Git repository at: https://github.com/tienfong/uboot_mainline.git next-socfpga for you to fetch changes up to 31b51cb1d2b4114085cb5565502d39d6f6daa2a7: arm: socfpga: Enable Intel N5X device build (2021-08-25 15:26:38 +0800) ---------------------------------------------------------------- Siew Chin Lim (14): arm: socfpga: Move linux_qspi_enable from bootcommand to board_prep_linux function arm: socfpga: Changed base_addr_s10.h to base_addr_soc64.h arm: socfpga: Add base address for Intel N5X device drivers: clk: Add clock driver for Intel N5X device arm: socfpga: Get clock manager base address for Intel N5X device drivers: clk: Add memory clock driver for Intel N5X device arm: socfpga: Move cm_get_mpu_clk_hz function declaration to clock_manager.h arm: socfpga: Add clock manager for Intel N5X device arm: socfpga: Changed misc_s10.c to misc_soc64.c arm: socfpga: Add SPL for Intel N5X device board: intel: Add socdk board support for Intel N5X device arm: dts: Add base dtsi and devkit dts for Intel N5X device include: configs: Add Intel N5X device CONFIGs arm: socfpga: Enable Intel N5X device build Tien Fong Chee (3): arm: socfpga: Add handoff data support for Intel N5X device ddr: socfpga: Enable memory test on memory size less than 1GB ddr: altera: Add SDRAM driver for Intel N5X device arch/arm/dts/Makefile | 1 + arch/arm/dts/socfpga_n5x-u-boot.dtsi | 191 +++++++++++++++++ arch/arm/dts/socfpga_n5x_socdk-u-boot.dtsi | 63 ++++++ arch/arm/dts/socfpga_n5x_socdk.dts | 122 +++++++++++ arch/arm/mach-socfpga/Kconfig | 21 +- arch/arm/mach-socfpga/Makefile | 32 ++- arch/arm/mach-socfpga/board.c | 17 +- arch/arm/mach-socfpga/clock_manager_n5x.c | 80 +++++++ arch/arm/mach-socfpga/include/mach/{base_addr_s10.h => base_addr_soc64.h} | 11 +- arch/arm/mach-socfpga/include/mach/clock_manager.h | 3 + arch/arm/mach-socfpga/include/mach/clock_manager_agilex.h | 2 - arch/arm/mach-socfpga/include/mach/clock_manager_arria10.h | 1 - arch/arm/mach-socfpga/include/mach/clock_manager_gen5.h | 1 - arch/arm/mach-socfpga/include/mach/clock_manager_n5x.h | 12 ++ arch/arm/mach-socfpga/include/mach/clock_manager_s10.h | 1 - arch/arm/mach-socfpga/include/mach/firewall.h | 6 + arch/arm/mach-socfpga/include/mach/handoff_soc64.h | 38 +++- arch/arm/mach-socfpga/include/mach/system_manager_soc64.h | 10 +- arch/arm/mach-socfpga/misc.c | 3 + arch/arm/mach-socfpga/{misc_s10.c => misc_soc64.c} | 12 +- arch/arm/mach-socfpga/spl_n5x.c | 94 +++++++++ arch/arm/mach-socfpga/system_manager_soc64.c | 18 +- arch/arm/mach-socfpga/wrap_handoff_soc64.c | 132 +++++++++--- board/intel/n5x-socdk/MAINTAINERS | 7 + board/intel/n5x-socdk/Makefile | 7 + board/intel/n5x-socdk/socfpga.c | 7 + configs/socfpga_agilex_atf_defconfig | 2 +- configs/socfpga_n5x_atf_defconfig | 74 +++++++ configs/socfpga_n5x_defconfig | 65 ++++++ configs/socfpga_n5x_vab_defconfig | 75 +++++++ configs/socfpga_stratix10_atf_defconfig | 2 +- drivers/clk/altera/Makefile | 4 +- drivers/clk/altera/clk-mem-n5x.c | 136 ++++++++++++ drivers/clk/altera/clk-mem-n5x.h | 84 ++++++++ drivers/clk/altera/clk-n5x.c | 489 ++++++++++++++++++++++++++++++++++++++++++ drivers/clk/altera/clk-n5x.h | 217 +++++++++++++++++++ drivers/ddr/altera/Makefile | 3 +- drivers/ddr/altera/sdram_n5x.c | 2298 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++ drivers/ddr/altera/sdram_soc64.c | 94 ++++++++- drivers/ddr/altera/sdram_soc64.h | 1 + include/configs/socfpga_n5x_socdk.h | 45 ++++ include/configs/socfpga_soc64_common.h | 2 +- include/dt-bindings/clock/n5x-clock.h | 71 +++++++ 43 files changed, 4465 insertions(+), 89 deletions(-) create mode 100644 arch/arm/dts/socfpga_n5x-u-boot.dtsi create mode 100644 arch/arm/dts/socfpga_n5x_socdk-u-boot.dtsi create mode 100644 arch/arm/dts/socfpga_n5x_socdk.dts create mode 100644 arch/arm/mach-socfpga/clock_manager_n5x.c rename arch/arm/mach-socfpga/include/mach/{base_addr_s10.h => base_addr_soc64.h} (85%) create mode 100644 arch/arm/mach-socfpga/include/mach/clock_manager_n5x.h rename arch/arm/mach-socfpga/{misc_s10.c => misc_soc64.c} (100%) create mode 100644 arch/arm/mach-socfpga/spl_n5x.c create mode 100644 board/intel/n5x-socdk/MAINTAINERS create mode 100644 board/intel/n5x-socdk/Makefile create mode 100644 board/intel/n5x-socdk/socfpga.c create mode 100644 configs/socfpga_n5x_atf_defconfig create mode 100644 configs/socfpga_n5x_defconfig create mode 100644 configs/socfpga_n5x_vab_defconfig create mode 100644 drivers/clk/altera/clk-mem-n5x.c create mode 100644 drivers/clk/altera/clk-mem-n5x.h create mode 100644 drivers/clk/altera/clk-n5x.c create mode 100644 drivers/clk/altera/clk-n5x.h create mode 100644 drivers/ddr/altera/sdram_n5x.c create mode 100644 include/configs/socfpga_n5x_socdk.h create mode 100644 include/dt-bindings/clock/n5x-clock.h