| Message ID | AD13664F485EE54694E29A7F9D5BE1AF0F3EDC@039-SN2MPN1-022.039d.mgd.msft.net |
|---|---|
| State | Superseded |
| Headers | show |
Hi Jason,
On Tue, Mar 13, 2012 at 12:03 PM, Liu Hui-R64343 <r64343@freescale.com> wrote:
> This is not complete, you are still hard coding it. In fact,The ANATOP register contains both the chip ID and chip revision.
Ok, I have a new version that reads both chip ID and chip revision.
Will send it soon.
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c index 2ac74b5..639bf30 100644 --- a/arch/arm/cpu/armv7/mx6/soc.c +++ b/arch/arm/cpu/armv7/mx6/soc.c @@ -32,7 +32,8 @@ u32 get_cpu_rev(void) { - int system_rev = 0x61000 | CHIP_REV_1_0; + int reg = readl(ANATOP_BASE_ADDR + 0x260) & 0xFF; + int system_rev = 0x61000 | 0x10 + reg; This is not complete, you are still hard coding it. In fact,The ANATOP register contains both the chip ID and chip revision.