| Message ID | 8624FC902C662B4D9D77440AF5EA66252C5AF1C8@temmail01.mytem.ch |
|---|---|
| State | Not Applicable |
| Delegated to: | Stefano Babic |
| Headers | show |
Hi Peter, On Tue, Nov 24, 2015 at 9:50 AM, Bärtsch Peter <Peter.Baertsch@tem.ch> wrote: > Hi, > > Here a imx6sx clock fix for using raw nand gpmi interface. Thanks for sending your fix. You need to add your Signed-off-by tag to your patch and also a commit log explaining why this change is needed. You can refer to http://www.denx.de/wiki/U-Boot/Patches Please copy the ARM imx maintainer Stefano Babic <sbabic@denx.de>. Also, it would be better to use git send-email. Thanks, Fabio Estevam
Index: git/arch/arm/cpu/armv7/mx6/clock.c =================================================================== --- git.orig/arch/arm/cpu/armv7/mx6/clock.c 2015-11-24 10:06:02.814884669 +0100 +++ git/arch/arm/cpu/armv7/mx6/clock.c 2015-11-24 10:06:03.442884668 +0100 @@ -47,6 +47,17 @@ MXC_CCM_CCGR4_RAWNAND_U_GPMI_INPUT_APB_MASK | MXC_CCM_CCGR4_PL301_MX6QPER1_BCH_MASK); +#ifdef CONFIG_MX6SX + clrbits_le32(&imx_ccm->CCGR4, MXC_CCM_CCGR4_QSPI2_ENFC_MASK); + + clrsetbits_le32(&imx_ccm->cs2cdr, + MXC_CCM_CS2CDR_QSPI2_CLK_PODF_MASK | + MXC_CCM_CS2CDR_QSPI2_CLK_PRED_MASK | + MXC_CCM_CS2CDR_QSPI2_CLK_SEL_MASK, + cfg); + + setbits_le32(&imx_ccm->CCGR4, MXC_CCM_CCGR4_QSPI2_ENFC_MASK); +#else clrbits_le32(&imx_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); clrsetbits_le32(&imx_ccm->cs2cdr, @@ -56,6 +67,7 @@ cfg);
Hi, Here a imx6sx clock fix for using raw nand gpmi interface. setbits_le32(&imx_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); +#endif setbits_le32(&imx_ccm->CCGR4, MXC_CCM_CCGR4_RAWNAND_U_BCH_INPUT_APB_MASK | MXC_CCM_CCGR4_RAWNAND_U_GPMI_BCH_INPUT_BCH_MASK | Kind regards Peter Bärtsch TEM AG Triststrasse 8 7007 Chur, Schweiz