From patchwork Wed Apr 8 13:20:07 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sanchayan Maity X-Patchwork-Id: 459252 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id CB0F91401B1 for ; Wed, 8 Apr 2015 23:22:57 +1000 (AEST) Authentication-Results: ozlabs.org; dkim=fail reason="verification failed; unprotected key" header.d=gmail.com header.i=@gmail.com header.b=jFNceR8V; dkim-adsp=none (unprotected policy); dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E9A55A7485; Wed, 8 Apr 2015 15:22:49 +0200 (CEST) X-Amavis-Alert: BAD HEADER SECTION, Duplicate header field: "References" Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id oXiBx41hnZKY; Wed, 8 Apr 2015 15:22:49 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 57506A7477; Wed, 8 Apr 2015 15:22:46 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 17664A7472 for ; Wed, 8 Apr 2015 15:22:35 +0200 (CEST) X-Amavis-Alert: BAD HEADER SECTION, Duplicate header field: "References" Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id iwWHYrfvkO0O for ; Wed, 8 Apr 2015 15:22:34 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pa0-f41.google.com (mail-pa0-f41.google.com [209.85.220.41]) by theia.denx.de (Postfix) with ESMTPS id 3FB44A7489 for ; Wed, 8 Apr 2015 15:22:28 +0200 (CEST) Received: by pabsx10 with SMTP id sx10so114716314pab.3 for ; Wed, 08 Apr 2015 06:22:26 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=ZhShoi5cq0cQEEyUmK3UoiuejymH2gf92jCiKzErFpc=; b=jFNceR8VLHLdnShzseR/hW0QqqQjSxsFAqSmmjDPEtOPfJ73smKDQjbWhJDWP53Lbg 7kwbnHy3wWqbcmypR5moX0ISlyEr4rVJC1LvuBk4EEmVb04jt4KvdfdgGv0q8FkLg6QX aNOMOiij9baAYnbmT8ICv1xuYjkk/+70QITtrzxbOpN6Hz6+ZJvshKaVEZKC6nV+quRt lGcvXtxKOdoL7buu0f+NyG5FxnBGUjHiNgYjwkET3k/TN/Zh7layAdeF/NCwdBZRnW1f yzlWdOTh5pTn4nOxXk4cfccghQhywf4Cgu9Se9kWDyXwDrYD79aKRyFU43MDUJjHhNXw K4tA== X-Received: by 10.66.141.202 with SMTP id rq10mr47057391pab.64.1428499346388; Wed, 08 Apr 2015 06:22:26 -0700 (PDT) Received: from localhost ([115.115.225.206]) by mx.google.com with ESMTPSA id i6sm11340414pdp.53.2015.04.08.06.22.24 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 08 Apr 2015 06:22:25 -0700 (PDT) From: Sanchayan Maity To: u-boot@lists.denx.de, sbabic@denx.de Date: Wed, 8 Apr 2015 18:50:07 +0530 Message-Id: <7da060b4b27375b40cc19fea9a44a83bbb921a79.1428497492.git.maitysanchayan@gmail.com> X-Mailer: git-send-email 2.3.5 In-Reply-To: References: In-Reply-To: References: Cc: marex@denx.de, bhuvanchandra.dv@toradex.com, trini@konsulko.com, marcel@ziswiler.com Subject: [U-Boot] [PATCH v2 3/6] ARM: vf610: Add SoC and CPU type detection X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Vybrid product family consists of several rather similar SoC which can be determined by softare during boot time. This allows use of variable ${soc} for Linux device tree files. Detect VF5xx CPU's by reading the CPU count register. We can determine the second number of the CPU type (VF6x0) which indicates the presence of a L2 cache. Signed-off-by: Stefan Agner Signed-off-by: Sanchayan Maity --- arch/arm/cpu/armv7/vf610/generic.c | 29 +++++++++++++++++++++++++++-- arch/arm/include/asm/arch-vf610/imx-regs.h | 12 ++++++++++++ 2 files changed, 39 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv7/vf610/generic.c b/arch/arm/cpu/armv7/vf610/generic.c index 92aaad9..3bdc221 100644 --- a/arch/arm/cpu/armv7/vf610/generic.c +++ b/arch/arm/cpu/armv7/vf610/generic.c @@ -18,6 +18,8 @@ DECLARE_GLOBAL_DATA_PTR; #endif +static char soc_type[] = "xx0"; + #ifdef CONFIG_MXC_OCOTP void enable_ocotp_clk(unsigned char enable) { @@ -284,14 +286,37 @@ static char *get_reset_cause(void) int print_cpuinfo(void) { - printf("CPU: Freescale Vybrid VF610 at %d MHz\n", - mxc_get_clock(MXC_ARM_CLK) / 1000000); + printf("CPU: Freescale Vybrid VF%s at %d MHz\n", + soc_type, mxc_get_clock(MXC_ARM_CLK) / 1000000); printf("Reset cause: %s\n", get_reset_cause()); return 0; } #endif +int arch_cpu_init(void) +{ + struct mscm *mscm = (struct mscm *)MSCM_BASE_ADDR; + + soc_type[0] = mscm->cpxcount ? '6' : '5'; /*Dual Core => VF6x0 */ + soc_type[1] = mscm->cpxcfg1 ? '1' : '0'; /* L2 Cache => VFx10 */ + + return 0; +} + +#ifdef CONFIG_ARCH_MISC_INIT +int arch_misc_init(void) +{ + char soc[6]; + + strcat(soc, "vf"); + strcat(soc, soc_type); + setenv("soc", soc); + + return 0; +} +#endif + int cpu_eth_init(bd_t *bis) { int rc = -ENODEV; diff --git a/arch/arm/include/asm/arch-vf610/imx-regs.h b/arch/arm/include/asm/arch-vf610/imx-regs.h index aa60031..a5908ca 100644 --- a/arch/arm/include/asm/arch-vf610/imx-regs.h +++ b/arch/arm/include/asm/arch-vf610/imx-regs.h @@ -457,6 +457,18 @@ struct scsc_reg { u32 sosc_ctr; }; +/* MSCM */ +struct mscm { + u32 cpxtype; + u32 cpxnum; + u32 cpxmaster; + u32 cpxcount; + u32 cpxcfg0; + u32 cpxcfg1; + u32 cpxcfg2; + u32 cpxcfg3; +}; + #endif /* __ASSEMBLER__*/ #endif /* __ASM_ARCH_IMX_REGS_H__ */