Message ID | 75cd52cc-2e30-46b2-a44d-03c673ea124d@ATCPCS12.andestech.com |
---|---|
State | Accepted |
Delegated to: | Tom Rini |
Headers | show |
Series | Pull request: u-boot-riscv/master | expand |
On Mon, Jan 18, 2021 at 02:55:46PM +0800, uboot@andestech.com wrote: > Hi Tom, > > Please pull some riscv updates: > > - Update qemu-riscv.rst build instructions. > - Add support for SPI on Kendryte K210. > - Add Microchip PolarFire SoC Icicle Kit support. > - Add support for an early timer. > - select TIMER_EARLY to avoid infinite recursion for Trace. > > Thanks > Rick > > CI: passed > https://gitlab.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/5918 > > The following changes since commit 14ea1b3635b4af8d9e283e3671f7ee872d50b859: > > Merge branch '2021-01-15-assorted-improvements' (2021-01-16 11:14:21 -0500) > > are available in the Git repository at: > > git@gitlab.denx.de:u-boot/custodians/u-boot-riscv.git > > for you to fetch changes up to 9e550e18305fb31af83bfb72d16e86d8c054fb65: > > doc: board: Add Microchip MPFS Icicle Kit doc (2021-01-18 11:06:39 +0800) > Applied to u-boot/master, thanks!