| Message ID | 613d6bcffd9070f62cf348079ed16c120f8fc56f.1668612993.git.michal.simek@amd.com |
|---|---|
| State | Changes Requested |
| Delegated to: | Michal Simek |
| Headers | show |
| Series | soc: xilinx: versal-net: Add soc_xilinx_versal_net driver | expand |
st 16. 11. 2022 v 16:36 odesÃlatel Michal Simek <michal.simek@amd.com> napsal: > > Add soc_xilinx_versal_net driver to identify the family & revision of > versal-net SoC. Add Kconfig option CONFIG_SOC_XILINX_VERSAL_NET to > enable/disable this driver. To enable this driver by default, add this > config to xilinx_versal_net_virt_defconfig file. This driver will be > probed using platdata U_BOOT_DEVICE structure which is specified in > mach-versal-net/cpu.c. > > Signed-off-by: Michal Simek <michal.simek@amd.com> > Signed-off-by: Ashok Reddy Soma <ashok.reddy.soma@amd.com> > --- > > MAINTAINERS | 1 + > arch/arm/mach-versal-net/cpu.c | 5 ++ > configs/xilinx_versal_net_virt_defconfig | 2 + > drivers/soc/Kconfig | 8 +++ > drivers/soc/Makefile | 1 + > drivers/soc/soc_xilinx_versal_net.c | 78 ++++++++++++++++++++++++ > 6 files changed, 95 insertions(+) > create mode 100644 drivers/soc/soc_xilinx_versal_net.c > > diff --git a/MAINTAINERS b/MAINTAINERS > index 8d3d528650a7..b88f02fea772 100644 > --- a/MAINTAINERS > +++ b/MAINTAINERS > @@ -655,6 +655,7 @@ M: Michal Simek <michal.simek@amd.com> > S: Maintained > T: git https://source.denx.de/u-boot/custodians/u-boot-microblaze.git > F: arch/arm/mach-versal-net/ > +F: drivers/soc/soc_xilinx_versal_net.c > N: (?<!uni)versal-net > > ARM VERSAL > diff --git a/arch/arm/mach-versal-net/cpu.c b/arch/arm/mach-versal-net/cpu.c > index 4c9b15411df2..a82741e70fc8 100644 > --- a/arch/arm/mach-versal-net/cpu.c > +++ b/arch/arm/mach-versal-net/cpu.c > @@ -15,6 +15,7 @@ > #include <asm/arch/hardware.h> > #include <asm/arch/sys_proto.h> > #include <asm/cache.h> > +#include <dm/platdata.h> > > DECLARE_GLOBAL_DATA_PTR; > > @@ -87,3 +88,7 @@ u64 get_page_table_size(void) > { > return 0x14000; > } > + > +U_BOOT_DRVINFO(soc_xilinx_versal_net) = { > + .name = "soc_xilinx_versal_net", > +}; > diff --git a/configs/xilinx_versal_net_virt_defconfig b/configs/xilinx_versal_net_virt_defconfig > index 8a53490ba87d..431a8de9fcf2 100644 > --- a/configs/xilinx_versal_net_virt_defconfig > +++ b/configs/xilinx_versal_net_virt_defconfig > @@ -108,6 +108,8 @@ CONFIG_RESET_ZYNQMP=y > CONFIG_ARM_DCC=y > CONFIG_PL01X_SERIAL=y > CONFIG_XILINX_UARTLITE=y > +CONFIG_SOC_DEVICE=y > +CONFIG_SOC_XILINX_VERSAL_NET=y > CONFIG_SPI=y > CONFIG_DM_SPI=y > CONFIG_CADENCE_QSPI=y > diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig > index 292dc41b6fa2..acf555baaec2 100644 > --- a/drivers/soc/Kconfig > +++ b/drivers/soc/Kconfig > @@ -32,6 +32,14 @@ config SOC_XILINX_VERSAL > This allows other drivers to verify the SoC familiy & revision using > matching SoC attributes. > > +config SOC_XILINX_VERSAL_NET > + bool "Enable SoC Device ID driver for Xilinx Versal NET" > + depends on SOC_DEVICE && ARCH_VERSAL_NET > + help > + Enable this option to select SoC device id driver for Xilinx Versal NET. > + This allows other drivers to verify the SoC familiy & revision using > + matching SoC attributes. > + > source "drivers/soc/ti/Kconfig" > > endmenu > diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile > index 031fa7612f48..84385650d46d 100644 > --- a/drivers/soc/Makefile > +++ b/drivers/soc/Makefile > @@ -8,3 +8,4 @@ obj-$(CONFIG_SOC_DEVICE_TI_K3) += soc_ti_k3.o > obj-$(CONFIG_SANDBOX) += soc_sandbox.o > obj-$(CONFIG_SOC_XILINX_ZYNQMP) += soc_xilinx_zynqmp.o > obj-$(CONFIG_SOC_XILINX_VERSAL) += soc_xilinx_versal.o > +obj-$(CONFIG_SOC_XILINX_VERSAL_NET) += soc_xilinx_versal_net.o > diff --git a/drivers/soc/soc_xilinx_versal_net.c b/drivers/soc/soc_xilinx_versal_net.c > new file mode 100644 > index 000000000000..146d068bb4ae > --- /dev/null > +++ b/drivers/soc/soc_xilinx_versal_net.c > @@ -0,0 +1,78 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Xilinx Versal NET SOC driver > + * > + * Copyright (C) 2022, Advanced Micro Devices, Inc. > + */ > + > +#include <common.h> > +#include <dm.h> > +#include <soc.h> > +#include <zynqmp_firmware.h> > +#include <asm/io.h> > +#include <asm/arch/hardware.h> > + > +#include <linux/bitfield.h> > + > +/* > + * v1 -> 0x10 - ES1 > + * v2 -> 0x20 - Production > + */ > +static const char versal_family[] = "Versal NET"; > + > +struct soc_xilinx_versal_net_priv { > + const char *family; > + char revision; > +}; > + > +static int soc_xilinx_versal_net_get_family(struct udevice *dev, char *buf, int size) > +{ > + struct soc_xilinx_versal_net_priv *priv = dev_get_priv(dev); > + > + return snprintf(buf, size, "%s", priv->family); > +} > + > +static int soc_xilinx_versal_net_get_revision(struct udevice *dev, char *buf, int size) > +{ > + struct soc_xilinx_versal_net_priv *priv = dev_get_priv(dev); > + > + return snprintf(buf, size, "v%d", priv->revision); > +} > + > +static const struct soc_ops soc_xilinx_versal_net_ops = { > + .get_family = soc_xilinx_versal_net_get_family, > + .get_revision = soc_xilinx_versal_net_get_revision, > +}; > + > +static int soc_xilinx_versal_net_probe(struct udevice *dev) > +{ > + struct soc_xilinx_versal_net_priv *priv = dev_get_priv(dev); > + u32 ret_payload[PAYLOAD_ARG_CNT]; > + int ret; > + > + priv->family = versal_family; > + > + if (IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE)) { > + ret = xilinx_pm_request(PM_GET_CHIPID, 0, 0, 0, 0, > + ret_payload); > + if (ret) > + return ret; > + } else { > + ret_payload[2] = readl(PMC_TAP_VERSION); > + if (!ret_payload[2]) > + return -EINVAL; > + } > + > + priv->revision = FIELD_GET(PS_VERSION_MASK, ret_payload[2]); > + > + return 0; > +} > + > +U_BOOT_DRIVER(soc_xilinx_versal_net) = { > + .name = "soc_xilinx_versal_net", > + .id = UCLASS_SOC, > + .ops = &soc_xilinx_versal_net_ops, > + .probe = soc_xilinx_versal_net_probe, > + .priv_auto = sizeof(struct soc_xilinx_versal_net_priv), > + .flags = DM_FLAG_PRE_RELOC, > +}; > -- > 2.36.1 > Applied M
diff --git a/MAINTAINERS b/MAINTAINERS index 8d3d528650a7..b88f02fea772 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -655,6 +655,7 @@ M: Michal Simek <michal.simek@amd.com> S: Maintained T: git https://source.denx.de/u-boot/custodians/u-boot-microblaze.git F: arch/arm/mach-versal-net/ +F: drivers/soc/soc_xilinx_versal_net.c N: (?<!uni)versal-net ARM VERSAL diff --git a/arch/arm/mach-versal-net/cpu.c b/arch/arm/mach-versal-net/cpu.c index 4c9b15411df2..a82741e70fc8 100644 --- a/arch/arm/mach-versal-net/cpu.c +++ b/arch/arm/mach-versal-net/cpu.c @@ -15,6 +15,7 @@ #include <asm/arch/hardware.h> #include <asm/arch/sys_proto.h> #include <asm/cache.h> +#include <dm/platdata.h> DECLARE_GLOBAL_DATA_PTR; @@ -87,3 +88,7 @@ u64 get_page_table_size(void) { return 0x14000; } + +U_BOOT_DRVINFO(soc_xilinx_versal_net) = { + .name = "soc_xilinx_versal_net", +}; diff --git a/configs/xilinx_versal_net_virt_defconfig b/configs/xilinx_versal_net_virt_defconfig index 8a53490ba87d..431a8de9fcf2 100644 --- a/configs/xilinx_versal_net_virt_defconfig +++ b/configs/xilinx_versal_net_virt_defconfig @@ -108,6 +108,8 @@ CONFIG_RESET_ZYNQMP=y CONFIG_ARM_DCC=y CONFIG_PL01X_SERIAL=y CONFIG_XILINX_UARTLITE=y +CONFIG_SOC_DEVICE=y +CONFIG_SOC_XILINX_VERSAL_NET=y CONFIG_SPI=y CONFIG_DM_SPI=y CONFIG_CADENCE_QSPI=y diff --git a/drivers/soc/Kconfig b/drivers/soc/Kconfig index 292dc41b6fa2..acf555baaec2 100644 --- a/drivers/soc/Kconfig +++ b/drivers/soc/Kconfig @@ -32,6 +32,14 @@ config SOC_XILINX_VERSAL This allows other drivers to verify the SoC familiy & revision using matching SoC attributes. +config SOC_XILINX_VERSAL_NET + bool "Enable SoC Device ID driver for Xilinx Versal NET" + depends on SOC_DEVICE && ARCH_VERSAL_NET + help + Enable this option to select SoC device id driver for Xilinx Versal NET. + This allows other drivers to verify the SoC familiy & revision using + matching SoC attributes. + source "drivers/soc/ti/Kconfig" endmenu diff --git a/drivers/soc/Makefile b/drivers/soc/Makefile index 031fa7612f48..84385650d46d 100644 --- a/drivers/soc/Makefile +++ b/drivers/soc/Makefile @@ -8,3 +8,4 @@ obj-$(CONFIG_SOC_DEVICE_TI_K3) += soc_ti_k3.o obj-$(CONFIG_SANDBOX) += soc_sandbox.o obj-$(CONFIG_SOC_XILINX_ZYNQMP) += soc_xilinx_zynqmp.o obj-$(CONFIG_SOC_XILINX_VERSAL) += soc_xilinx_versal.o +obj-$(CONFIG_SOC_XILINX_VERSAL_NET) += soc_xilinx_versal_net.o diff --git a/drivers/soc/soc_xilinx_versal_net.c b/drivers/soc/soc_xilinx_versal_net.c new file mode 100644 index 000000000000..146d068bb4ae --- /dev/null +++ b/drivers/soc/soc_xilinx_versal_net.c @@ -0,0 +1,78 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Xilinx Versal NET SOC driver + * + * Copyright (C) 2022, Advanced Micro Devices, Inc. + */ + +#include <common.h> +#include <dm.h> +#include <soc.h> +#include <zynqmp_firmware.h> +#include <asm/io.h> +#include <asm/arch/hardware.h> + +#include <linux/bitfield.h> + +/* + * v1 -> 0x10 - ES1 + * v2 -> 0x20 - Production + */ +static const char versal_family[] = "Versal NET"; + +struct soc_xilinx_versal_net_priv { + const char *family; + char revision; +}; + +static int soc_xilinx_versal_net_get_family(struct udevice *dev, char *buf, int size) +{ + struct soc_xilinx_versal_net_priv *priv = dev_get_priv(dev); + + return snprintf(buf, size, "%s", priv->family); +} + +static int soc_xilinx_versal_net_get_revision(struct udevice *dev, char *buf, int size) +{ + struct soc_xilinx_versal_net_priv *priv = dev_get_priv(dev); + + return snprintf(buf, size, "v%d", priv->revision); +} + +static const struct soc_ops soc_xilinx_versal_net_ops = { + .get_family = soc_xilinx_versal_net_get_family, + .get_revision = soc_xilinx_versal_net_get_revision, +}; + +static int soc_xilinx_versal_net_probe(struct udevice *dev) +{ + struct soc_xilinx_versal_net_priv *priv = dev_get_priv(dev); + u32 ret_payload[PAYLOAD_ARG_CNT]; + int ret; + + priv->family = versal_family; + + if (IS_ENABLED(CONFIG_ZYNQMP_FIRMWARE)) { + ret = xilinx_pm_request(PM_GET_CHIPID, 0, 0, 0, 0, + ret_payload); + if (ret) + return ret; + } else { + ret_payload[2] = readl(PMC_TAP_VERSION); + if (!ret_payload[2]) + return -EINVAL; + } + + priv->revision = FIELD_GET(PS_VERSION_MASK, ret_payload[2]); + + return 0; +} + +U_BOOT_DRIVER(soc_xilinx_versal_net) = { + .name = "soc_xilinx_versal_net", + .id = UCLASS_SOC, + .ops = &soc_xilinx_versal_net_ops, + .probe = soc_xilinx_versal_net_probe, + .priv_auto = sizeof(struct soc_xilinx_versal_net_priv), + .flags = DM_FLAG_PRE_RELOC, +};