From patchwork Mon Jul 6 08:20:31 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marcel Ziswiler X-Patchwork-Id: 491462 X-Patchwork-Delegate: twarren@nvidia.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3BB83140DBC for ; Mon, 6 Jul 2015 18:21:59 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id ABD674B699; Mon, 6 Jul 2015 10:21:50 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id xMSycKHtYuEH; Mon, 6 Jul 2015 10:21:50 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 370CA4B639; Mon, 6 Jul 2015 10:21:50 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id BCB834B67B for ; Mon, 6 Jul 2015 10:21:47 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 77LeRbnK7ZMH for ; Mon, 6 Jul 2015 10:21:47 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mout.perfora.net (mout.perfora.net [74.208.4.194]) by theia.denx.de (Postfix) with ESMTPS id 33D424B653 for ; Mon, 6 Jul 2015 10:21:44 +0200 (CEST) Received: from localhost.localdomain ([46.140.72.82]) by mrelay.perfora.net (mreueus002) with ESMTPSA (Nemesis) id 0LiVuU-1YbrQE0Obs-00cfO2; Mon, 06 Jul 2015 10:21:30 +0200 From: Marcel Ziswiler To: u-boot@lists.denx.de Date: Mon, 6 Jul 2015 10:20:31 +0200 Message-Id: <5ad67d5eeeb894c8dcaea44d9280f39117548928.1436170106.git.marcel.ziswiler@toradex.com> X-Mailer: git-send-email 1.9.3 In-Reply-To: References: X-Provags-ID: V03:K0:Q/nICVU+lkpxk2OJcEyirpgqppyr11jsdpA+SSIJm4xvbaX4Vbp jzmhvK+GUQQt2bO6vNSGMUu+ed3mp6L5xddrdkX5kJ6roYdwlvF0rBetgCrmOS6b/dpyiDp bKlnis3TS48xOExQU4I+UUjc1bhmnrcwJP6CXDKskK4HTeFKIfff7GXjIqR4QXbXUX4+AdV npF5OtYC2yvZPv4kb1y0w== X-UI-Out-Filterresults: notjunk:1; V01:K0:ojOSrAJi0ZY=:UVQDJpZ9OZ9qTsHomaMfM7 OZsFbugMvCl2tBSMrjgCA7ccIRjKDkswtFbkdaulb55wpIzcsmtKGzAMD8t3tq+5TnWgMoKjQ TctIjK40BJMytdeby3qGCf6VvWtxDfQtNrz8BuPSF6nyDStwLcc3xIsHOaMXembcLzNEm7/JD 4hA11wMWNV681h7hDH5ebh3/TKnr3nnzMFEDFxxDBr3fv3SI8IB/kknrhCJhS913+tgfDQ+vM C9qILOWFjrjFDFnVVi0ALoIDvBEj6VRmiC79htdKrjSAGjgGxo++LKHVphYYPRJl/SpH/LcpO YsrmgZBmzXlOUGrjvsjttCwFiKATT6MIL103pB4q2TmINITW6BVkb5VWqAcwACxdNGfgZK+2z eCZeKwdbMbpCjo1tzDguz3nNSQBh3bzdNrcBsT3CTeZenJPN1pLNNstL2Vmi5hZs5gZcNnDgW CjPsR28PcnEOudtiMCuX/AVh5wC7I8oCJSTIskLaVOoyh2jaqFyQf05j702m0UczK8cRejNY0 C+rFnUhqsJDP7IHea1l2qM6MuUFyZXmrOPPWYihdDi5oFhrCBSsOEFkTLrMXqTMiTWM4syCxe CubC2KriDkdfiIztUVK4amy36ONQGHk68t16Pe+HFennNefi3+uBi7s4A4JgXrh+seCyLjQe5 YQ6OCWxfokmT1tRW8cEvf6une Cc: Stefan Agner , Tom Rini , Marcel Ziswiler , Tom Warren , Max Krummenacher , Scott Wood , Stephen Warren Subject: [U-Boot] [PATCH 05/13] colibri_t20: add LCD display support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Marcel Ziswiler Add LCD display support defaulting to VESA VGA resolution. Different resolutions configurable via device-tree. Signed-off-by: Marcel Ziswiler Reviewed-by: Simon Glass --- arch/arm/dts/tegra20-colibri.dts | 29 +++++++++++++++++++++++++++++ board/toradex/colibri_t20/colibri_t20.c | 18 ++++++++++++++++++ include/configs/colibri_t20.h | 10 ++++++++++ 3 files changed, 57 insertions(+) diff --git a/arch/arm/dts/tegra20-colibri.dts b/arch/arm/dts/tegra20-colibri.dts index 257ca27..ae40bad 100644 --- a/arch/arm/dts/tegra20-colibri.dts +++ b/arch/arm/dts/tegra20-colibri.dts @@ -17,6 +17,17 @@ sdhci0 = "/sdhci@c8000600"; }; + host1x { + status = "okay"; + dc@54200000 { + status = "okay"; + rgb { + status = "okay"; + nvidia,panel = <&lcd_panel>; + }; + }; + }; + usb@c5000000 { dr_mode = "otg"; }; @@ -46,4 +57,22 @@ cd-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_LOW>; bus-width = <4>; }; + + lcd_panel: panel { + clock = <25175000>; + xres = <640>; + yres = <480>; + left-margin = <48>; /* horizontal back porch */ + right-margin = <16>; /* horizontal front porch */ + hsync-len = <96>; + lower-margin = <11>; /* vertical front porch */ + upper-margin = <31>; /* vertical back porch */ + vsync-len = <2>; + hsync-active-high; + vsync-active-high; + nvidia,bits-per-pixel = <16>; + nvidia,pwm = <&pwm 2 0>; + nvidia,backlight-enable-gpios = <&gpio TEGRA_GPIO(T, 4) GPIO_ACTIVE_HIGH>; + nvidia,panel-timings = <0 0 0 0>; + }; }; diff --git a/board/toradex/colibri_t20/colibri_t20.c b/board/toradex/colibri_t20/colibri_t20.c index 7210a8a..81d344c 100644 --- a/board/toradex/colibri_t20/colibri_t20.c +++ b/board/toradex/colibri_t20/colibri_t20.c @@ -75,3 +75,21 @@ void pin_mux_usb(void) pinmux_tristate_disable(PMUX_PINGRP_SPIG); } #endif + +#ifdef CONFIG_VIDEO_TEGRA +/* + * Routine: pin_mux_display + * Description: setup the pin muxes/tristate values for the LCD interface) + */ +void pin_mux_display(void) +{ + /* + * Manually untristate BL_ON (PT4 - SODIMM 71) as specified through + * device-tree + */ + pinmux_tristate_disable(PMUX_PINGRP_DTA); + + pinmux_set_func(PMUX_PINGRP_SDC, PMUX_FUNC_PWM); + pinmux_tristate_disable(PMUX_PINGRP_SDC); +} +#endif diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h index b22e82a..fce1411 100644 --- a/include/configs/colibri_t20.h +++ b/include/configs/colibri_t20.h @@ -47,6 +47,16 @@ /* General networking support */ #define CONFIG_CMD_DHCP +/* LCD support */ +#define CONFIG_LCD +#define CONFIG_PWM_TEGRA +#define CONFIG_VIDEO_TEGRA +#define LCD_BPP LCD_COLOR16 +#define CONFIG_SYS_WHITE_ON_BLACK +#define CONFIG_CONSOLE_SCROLL_LINES 10 +#define CONFIG_CMD_BMP +#define CONFIG_LCD_LOGO + /* NAND support */ #define CONFIG_CMD_NAND #define CONFIG_TEGRA_NAND