diff mbox series

zynqmp: Use the same style for macro definitions

Message ID 5989cba98afb0e3a184045dc5f96477c7f6a183d.1642162810.git.michal.simek@xilinx.com
State Deferred
Delegated to: Tom Rini
Headers show
Series zynqmp: Use the same style for macro definitions | expand

Commit Message

Michal Simek Jan. 14, 2022, 12:20 p.m. UTC
Use the same coding style for all macros.
 #define<space>NAME<tab/tabs>VALUE

Signed-off-by: Michal Simek <michal.simek@xilinx.com>
---

 include/zynqmp_firmware.h | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

Comments

Michal Simek Jan. 19, 2022, 10:40 a.m. UTC | #1
pá 14. 1. 2022 v 13:20 odesílatel Michal Simek <michal.simek@xilinx.com> napsal:
>
> Use the same coding style for all macros.
>  #define<space>NAME<tab/tabs>VALUE
>
> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
> ---
>
>  include/zynqmp_firmware.h | 20 ++++++++++----------
>  1 file changed, 10 insertions(+), 10 deletions(-)
>
> diff --git a/include/zynqmp_firmware.h b/include/zynqmp_firmware.h
> index 51ecbef63464..19c004e91993 100644
> --- a/include/zynqmp_firmware.h
> +++ b/include/zynqmp_firmware.h
> @@ -342,20 +342,20 @@ enum pm_ioctl_id {
>         IOCTL_AIE_ISR_CLEAR = 24,
>  };
>
> -#define PM_SIP_SVC      0xc2000000
> +#define PM_SIP_SVC     0xc2000000
>
> -#define ZYNQMP_PM_VERSION_MAJOR         1
> -#define ZYNQMP_PM_VERSION_MINOR         0
> -#define ZYNQMP_PM_VERSION_MAJOR_SHIFT   16
> -#define ZYNQMP_PM_VERSION_MINOR_MASK    0xFFFF
> +#define ZYNQMP_PM_VERSION_MAJOR                1
> +#define ZYNQMP_PM_VERSION_MINOR                0
> +#define ZYNQMP_PM_VERSION_MAJOR_SHIFT  16
> +#define ZYNQMP_PM_VERSION_MINOR_MASK   0xFFFF
>
>  #define ZYNQMP_PM_VERSION       \
>         ((ZYNQMP_PM_VERSION_MAJOR << ZYNQMP_PM_VERSION_MAJOR_SHIFT) | \
>          ZYNQMP_PM_VERSION_MINOR)
>
> -#define ZYNQMP_PM_VERSION_INVALID       ~0
> +#define ZYNQMP_PM_VERSION_INVALID      ~0
>
> -#define PMUFW_V1_0      ((1 << ZYNQMP_PM_VERSION_MAJOR_SHIFT) | 0)
> +#define PMUFW_V1_0     ((1 << ZYNQMP_PM_VERSION_MAJOR_SHIFT) | 0)
>
>  /*
>   * Return payload size
> @@ -384,9 +384,9 @@ int xilinx_pm_request(u32 api_id, u32 arg0, u32 arg1, u32 arg2,
>  #define PM_MASTER_USING_SLAVE_MASK     0x2U
>
>  /* IPI Mask for Master */
> -#define PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK   0x00000001
> -#define PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK    0x00000100
> -#define PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK    0x00000200
> +#define PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK     0x00000001
> +#define PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK      0x00000100
> +#define PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK      0x00000200
>
>  enum zynqmp_pm_request_ack {
>         ZYNQMP_PM_REQUEST_ACK_NO = 1,
> --
> 2.34.1
>

It is based on some patches which haven't been sent yet that's why
please ignore this patch.

Thanks,
Michal
diff mbox series

Patch

diff --git a/include/zynqmp_firmware.h b/include/zynqmp_firmware.h
index 51ecbef63464..19c004e91993 100644
--- a/include/zynqmp_firmware.h
+++ b/include/zynqmp_firmware.h
@@ -342,20 +342,20 @@  enum pm_ioctl_id {
 	IOCTL_AIE_ISR_CLEAR = 24,
 };
 
-#define PM_SIP_SVC      0xc2000000
+#define PM_SIP_SVC	0xc2000000
 
-#define ZYNQMP_PM_VERSION_MAJOR         1
-#define ZYNQMP_PM_VERSION_MINOR         0
-#define ZYNQMP_PM_VERSION_MAJOR_SHIFT   16
-#define ZYNQMP_PM_VERSION_MINOR_MASK    0xFFFF
+#define ZYNQMP_PM_VERSION_MAJOR		1
+#define ZYNQMP_PM_VERSION_MINOR		0
+#define ZYNQMP_PM_VERSION_MAJOR_SHIFT	16
+#define ZYNQMP_PM_VERSION_MINOR_MASK	0xFFFF
 
 #define ZYNQMP_PM_VERSION       \
 	((ZYNQMP_PM_VERSION_MAJOR << ZYNQMP_PM_VERSION_MAJOR_SHIFT) | \
 	 ZYNQMP_PM_VERSION_MINOR)
 
-#define ZYNQMP_PM_VERSION_INVALID       ~0
+#define ZYNQMP_PM_VERSION_INVALID	~0
 
-#define PMUFW_V1_0      ((1 << ZYNQMP_PM_VERSION_MAJOR_SHIFT) | 0)
+#define PMUFW_V1_0	((1 << ZYNQMP_PM_VERSION_MAJOR_SHIFT) | 0)
 
 /*
  * Return payload size
@@ -384,9 +384,9 @@  int xilinx_pm_request(u32 api_id, u32 arg0, u32 arg1, u32 arg2,
 #define PM_MASTER_USING_SLAVE_MASK	0x2U
 
 /* IPI Mask for Master */
-#define PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK   0x00000001
-#define PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK    0x00000100
-#define PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK    0x00000200
+#define PM_CONFIG_IPI_PSU_CORTEXA53_0_MASK	0x00000001
+#define PM_CONFIG_IPI_PSU_CORTEXR5_0_MASK	0x00000100
+#define PM_CONFIG_IPI_PSU_CORTEXR5_1_MASK	0x00000200
 
 enum zynqmp_pm_request_ack {
 	ZYNQMP_PM_REQUEST_ACK_NO = 1,