From patchwork Wed Oct 17 08:33:28 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fabien Lahoudere X-Patchwork-Id: 985441 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=collabora.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 42Zwxl1ZZqz9s8F for ; Thu, 18 Oct 2018 02:26:19 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id C8A24C21DA1; Wed, 17 Oct 2018 15:22:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED, SPF_HELO_PASS, UNPARSEABLE_RELAY autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 8A47AC21E13; Wed, 17 Oct 2018 15:20:52 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 91EEFC21D8A; Wed, 17 Oct 2018 08:33:45 +0000 (UTC) Received: from bhuna.collabora.co.uk (bhuna.collabora.co.uk [46.235.227.227]) by lists.denx.de (Postfix) with ESMTPS id 4817EC21C38 for ; Wed, 17 Oct 2018 08:33:45 +0000 (UTC) Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: aragua) with ESMTPSA id BFB8427DFAA From: Fabien Lahoudere To: u-boot@lists.denx.de Date: Wed, 17 Oct 2018 10:33:28 +0200 Message-Id: <3c8faf8b897812a5026438733884a1ad3362ce3f.1539764688.git.fabien.lahoudere@collabora.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: References: In-Reply-To: References: X-Mailman-Approved-At: Wed, 17 Oct 2018 15:20:47 +0000 Cc: Fabien Lahoudere Subject: [U-Boot] [PATCH V3 3/6] bootcount: i2c: Add bus switching to the I2C bootcount driver X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Denis Zalevskiy If there is an I2C mux, current bus should be switched before manipulating with I2C. Signed-off-by: Denis Zalevskiy Signed-off-by: Fabien Lahoudere --- drivers/bootcount/Kconfig | 15 ++++++++- drivers/bootcount/bootcount_i2c.c | 71 ++++++++++++++++++++++++++++++++++----- 2 files changed, 77 insertions(+), 9 deletions(-) diff --git a/drivers/bootcount/Kconfig b/drivers/bootcount/Kconfig index 9a0bd51..f67f518 100644 --- a/drivers/bootcount/Kconfig +++ b/drivers/bootcount/Kconfig @@ -62,7 +62,9 @@ config BOOTCOUNT_I2C bool "Boot counter on I2C device" help Enable support for the bootcounter on an i2c (like RTC) device. - CONFIG_SYS_I2C_RTC_ADDR = i2c chip address + CONFIG_SYS_BOOTCOUNT_I2C_BUS = bus of the target I2C device, + CONFIG_SYS_I2C_RTC_ADDR is used as fallback + CONFIG_SYS_BOOTCOUNT_I2C_ADDR = target I2C device address CONFIG_SYS_BOOTCOUNT_ADDR = i2c addr which is used for the bootcounter. @@ -127,4 +129,15 @@ config SYS_BOOTCOUNT_ADDR help Set the address used for reading and writing the boot counter. +config SYS_BOOTCOUNT_I2C_BUS + int "I2C bootcounter device bus" + depends on BOOTCOUNT_I2C + help + I2C bus of the device used to store bootcounter + +config SYS_BOOTCOUNT_I2C_ADDR + hex "I2C bootcounter device address" + depends on BOOTCOUNT_I2C + help + I2C address of the device used to store bootcounter endif diff --git a/drivers/bootcount/bootcount_i2c.c b/drivers/bootcount/bootcount_i2c.c index 496741d..a1fc219 100644 --- a/drivers/bootcount/bootcount_i2c.c +++ b/drivers/bootcount/bootcount_i2c.c @@ -8,36 +8,91 @@ #include #include +#ifndef CONFIG_SYS_BOOTCOUNT_I2C_ADDR +/* compatibility with the previous logic: + * previous version of driver used RTC device to store bootcount + */ +#define CONFIG_SYS_BOOTCOUNT_I2C_ADDR CONFIG_SYS_I2C_RTC_ADDR +#endif + #define BC_MAGIC 0xbc +#ifdef CONFIG_SYS_BOOTCOUNT_I2C_BUS +static int bootcount_set_bus(void) +{ + unsigned int current_bus = i2c_get_bus_num(); + + assert(current_bus <= INT_MAX); + + int res = i2c_set_bus_num(CONFIG_SYS_BOOTCOUNT_I2C_BUS); + + if (res < 0) { + puts("Error switching I2C bus\n"); + return res; + } + return (int)current_bus; +} + +static void bootcount_set_bus_back(int prev_bus) +{ + if (i2c_set_bus_num(prev_bus) < 0) + puts("Can't switch I2C bus back\n"); +} +#else +static inline void bootcount_set_bus(void) { return ; } + +static inline int bootcount_set_bus_back(int prev_bus __attribute__((unused))) +{ + return 0; +} +#endif + void bootcount_store(ulong a) { + int prev_i2c_bus = bootcount_set_bus(); + + if (prev_i2c_bus < 0) + return; + unsigned char buf[3]; int ret; buf[0] = BC_MAGIC; buf[1] = (a & 0xff); - ret = i2c_write(CONFIG_SYS_I2C_RTC_ADDR, CONFIG_SYS_BOOTCOUNT_ADDR, - CONFIG_BOOTCOUNT_ALEN, buf, 2); + ret = i2c_write(CONFIG_SYS_BOOTCOUNT_I2C_ADDR, + CONFIG_SYS_BOOTCOUNT_ADDR, + CONFIG_BOOTCOUNT_ALEN, buf, 2); if (ret != 0) puts("Error writing bootcount\n"); + + bootcount_set_bus_back(prev_i2c_bus); } ulong bootcount_load(void) { + ulong count = 0; + + int prev_i2c_bus = bootcount_set_bus(); + + if (prev_i2c_bus < 0) + return count; + unsigned char buf[3]; int ret; - ret = i2c_read(CONFIG_SYS_I2C_RTC_ADDR, CONFIG_SYS_BOOTCOUNT_ADDR, + ret = i2c_read(CONFIG_SYS_BOOTCOUNT_I2C_ADDR, + CONFIG_SYS_BOOTCOUNT_ADDR, CONFIG_BOOTCOUNT_ALEN, buf, 2); if (ret != 0) { puts("Error loading bootcount\n"); - return 0; + goto out; } if (buf[0] == BC_MAGIC) - return buf[1]; - - bootcount_store(0); + count = buf[1]; + else + bootcount_store(count); - return 0; +out: + bootcount_set_bus_back(prev_i2c_bus); + return count; }