diff --git a/Kconfig b/Kconfig
index b45e60a75b93..c0fc8f798b8a 100644
--- a/Kconfig
+++ b/Kconfig
@@ -222,6 +222,15 @@ config NR_DRAM_BANKS
 	help
 	  This defines the number of DRAM banks.
 
+config SYS_MEM_TOP_HIDE
+	hex "Hide space (in bytes) from TOP memory"
+	default 0x0
+	help
+	  Subtract specified amount of memory to hide so that it won't
+	  get "touched" at all by U-Boot. By fixing up gd->ram_size
+	  the Linux kernel should now get passed the now "corrected"
+	  memory size and won't touch it either.
+
 config SYS_BOOT_GET_CMDLINE
 	bool "Enable kernel command line setup"
 	help
diff --git a/common/board_f.c b/common/board_f.c
index 5b655ad6efe4..643bb463580e 100644
--- a/common/board_f.c
+++ b/common/board_f.c
@@ -327,19 +327,20 @@ static int setup_dest_addr(void)
 	 * Ram is setup, size stored in gd !!
 	 */
 	debug("Ram size: %08lX\n", (ulong)gd->ram_size);
-#if defined(CONFIG_SYS_MEM_TOP_HIDE)
-	/*
-	 * Subtract specified amount of memory to hide so that it won't
-	 * get "touched" at all by U-Boot. By fixing up gd->ram_size
-	 * the Linux kernel should now get passed the now "corrected"
-	 * memory size and won't touch it either. This should work
-	 * for arch/ppc and arch/powerpc. Only Linux board ports in
-	 * arch/powerpc with bootwrapper support, that recalculate the
-	 * memory size from the SDRAM controller setup will have to
-	 * get fixed.
-	 */
-	gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
-#endif
+
+	if (CONFIG_SYS_MEM_TOP_HIDE)
+		/*
+		 * Subtract specified amount of memory to hide so that it won't
+		 * get "touched" at all by U-Boot. By fixing up gd->ram_size
+		 * the Linux kernel should now get passed the now "corrected"
+		 * memory size and won't touch it either. This should work
+		 * for arch/ppc and arch/powerpc. Only Linux board ports in
+		 * arch/powerpc with bootwrapper support, that recalculate the
+		 * memory size from the SDRAM controller setup will have to
+		 * get fixed.
+		 */
+		gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
+
 #ifdef CONFIG_SYS_SDRAM_BASE
 	gd->ram_base = CONFIG_SYS_SDRAM_BASE;
 #endif
diff --git a/configs/origen_defconfig b/configs/origen_defconfig
index 6ffec862cd9d..b4b0d8b1464c 100644
--- a/configs/origen_defconfig
+++ b/configs/origen_defconfig
@@ -16,6 +16,7 @@ CONFIG_SPL=y
 CONFIG_IDENT_STRING=" for ORIGEN"
 CONFIG_SYS_LOAD_ADDR=0x43e00000
 CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_MEM_TOP_HIDE=0x100000
 CONFIG_BOOTCOMMAND="if mmc rescan; then echo SD/MMC found on device ${mmcdev};if run loadbootenv; then echo Loaded environment from ${bootenv};run importbootenv;fi;if test -n $uenvcmd; then echo Running uenvcmd ...;run uenvcmd;fi;if run loadbootscript; then run bootscript; fi; fi;load mmc ${mmcdev} ${loadaddr} uImage; bootm ${loadaddr} "
 CONFIG_SYS_CONSOLE_IS_IN_ENV=y
 CONFIG_SYS_CONSOLE_INFO_QUIET=y
diff --git a/configs/s5pc210_universal_defconfig b/configs/s5pc210_universal_defconfig
index 8a34908e85cc..e70ce25b099d 100644
--- a/configs/s5pc210_universal_defconfig
+++ b/configs/s5pc210_universal_defconfig
@@ -13,6 +13,7 @@ CONFIG_ENV_OFFSET=0x7000
 CONFIG_DEFAULT_DEVICE_TREE="exynos4210-universal_c210"
 CONFIG_SYS_LOAD_ADDR=0x44800000
 CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_MEM_TOP_HIDE=0x100000
 CONFIG_USE_BOOTARGS=y
 CONFIG_BOOTARGS="Please use defined boot"
 CONFIG_BOOTCOMMAND="run mmcboot"
diff --git a/configs/theadorable_debug_defconfig b/configs/theadorable_debug_defconfig
index 64ae29113e3e..bee327e7ad6d 100644
--- a/configs/theadorable_debug_defconfig
+++ b/configs/theadorable_debug_defconfig
@@ -19,6 +19,7 @@ CONFIG_DEBUG_UART_BASE=0xd0012000
 CONFIG_DEBUG_UART_CLOCK=250000000
 CONFIG_SYS_LOAD_ADDR=0x800000
 CONFIG_DEBUG_UART=y
+CONFIG_SYS_MEM_TOP_HIDE=0x80000
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_FIT=y
 CONFIG_BOOTDELAY=3
diff --git a/configs/trats2_defconfig b/configs/trats2_defconfig
index b38ee99371b9..149ee98f590f 100644
--- a/configs/trats2_defconfig
+++ b/configs/trats2_defconfig
@@ -12,6 +12,7 @@ CONFIG_ENV_OFFSET=0x7000
 CONFIG_DEFAULT_DEVICE_TREE="exynos4412-trats2"
 CONFIG_SYS_LOAD_ADDR=0x43e00000
 CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_MEM_TOP_HIDE=0x100000
 # CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
diff --git a/configs/trats_defconfig b/configs/trats_defconfig
index d0689444f987..18890799535e 100644
--- a/configs/trats_defconfig
+++ b/configs/trats_defconfig
@@ -12,6 +12,7 @@ CONFIG_ENV_OFFSET=0x7000
 CONFIG_DEFAULT_DEVICE_TREE="exynos4210-trats"
 CONFIG_SYS_LOAD_ADDR=0x44800000
 CONFIG_DISTRO_DEFAULTS=y
+CONFIG_SYS_MEM_TOP_HIDE=0x100000
 CONFIG_FIT=y
 CONFIG_FIT_VERBOSE=y
 CONFIG_USE_BOOTARGS=y
diff --git a/include/configs/odroid.h b/include/configs/odroid.h
index 42031bb99344..d2cbba546705 100644
--- a/include/configs/odroid.h
+++ b/include/configs/odroid.h
@@ -22,7 +22,6 @@
 #define SDRAM_BANK_SIZE		(256 << 20)	/* 256 MB */
 #define PHYS_SDRAM_1		CONFIG_SYS_SDRAM_BASE
 /* Reserve the last 1 MiB for the secure firmware */
-#define CONFIG_SYS_MEM_TOP_HIDE		(1UL << 20UL)
 #define CONFIG_TZSW_RESERVED_DRAM_SIZE	CONFIG_SYS_MEM_TOP_HIDE
 
 #include <linux/sizes.h>
diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h
index 616f25eafd3e..a9a00897f56f 100644
--- a/include/configs/odroid_xu3.h
+++ b/include/configs/odroid_xu3.h
@@ -16,7 +16,6 @@
 
 #define SDRAM_BANK_SIZE			(256UL << 20UL)	/* 256 MB */
 /* Reserve the last 22 MiB for the secure firmware */
-#define CONFIG_SYS_MEM_TOP_HIDE		(22UL << 20UL)
 #define CONFIG_TZSW_RESERVED_DRAM_SIZE	CONFIG_SYS_MEM_TOP_HIDE
 
 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_LOAD_ADDR - 0x1000000)
diff --git a/include/configs/origen.h b/include/configs/origen.h
index 278c204ded8a..c4f5997c3dec 100644
--- a/include/configs/origen.h
+++ b/include/configs/origen.h
@@ -19,8 +19,6 @@
 #define PHYS_SDRAM_1			CONFIG_SYS_SDRAM_BASE
 #define SDRAM_BANK_SIZE			(256 << 20)	/* 256 MB */
 
-#define CONFIG_SYS_MEM_TOP_HIDE	(1 << 20)	/* ram console */
-
 /* Power Down Modes */
 #define S5P_CHECK_SLEEP			0x00000BAD
 #define S5P_CHECK_DIDLE			0xBAD00000
diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h
index 8cbdbc733c0b..ae56c66e15cd 100644
--- a/include/configs/s5pc210_universal.h
+++ b/include/configs/s5pc210_universal.h
@@ -24,8 +24,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_SYS_LOAD_ADDR \
 					- GENERATED_GBL_DATA_SIZE)
 
-#define CONFIG_SYS_MEM_TOP_HIDE	(1 << 20)	/* ram console */
-
 /* Actual modem binary size is 16MiB. Add 2MiB for bad block handling */
 
 #define NORMAL_MTDPARTS_DEFAULT CONFIG_MTDPARTS_DEFAULT
diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h
index 14817b165cfa..85a7aa6fccfa 100644
--- a/include/configs/theadorable.h
+++ b/include/configs/theadorable.h
@@ -44,7 +44,6 @@
 #define CONFIG_LBA48
 
 /* Enable LCD and reserve 512KB from top of memory*/
-#define CONFIG_SYS_MEM_TOP_HIDE		0x80000
 
 /* FPGA programming support */
 #define CONFIG_FPGA_STRATIX_V
diff --git a/include/configs/trats.h b/include/configs/trats.h
index 41ac6090c270..910fc150b18b 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -28,8 +28,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_SYS_LOAD_ADDR \
 					- GENERATED_GBL_DATA_SIZE)
 
-#define CONFIG_SYS_MEM_TOP_HIDE	(1 << 20)	/* ram console */
-
 /* Tizen - partitions definitions */
 #define PARTS_CSA		"csa-mmc"
 #define PARTS_BOOT		"boot"
diff --git a/include/configs/trats2.h b/include/configs/trats2.h
index a980e6c47d11..3e121bc6909a 100644
--- a/include/configs/trats2.h
+++ b/include/configs/trats2.h
@@ -27,8 +27,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_SYS_LOAD_ADDR \
 					- GENERATED_GBL_DATA_SIZE)
 
-#define CONFIG_SYS_MEM_TOP_HIDE	(1 << 20)	/* ram console */
-
 /* Tizen - partitions definitions */
 #define PARTS_CSA		"csa-mmc"
 #define PARTS_BOOT		"boot"
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index df70ae2264da..d4252b9a0b15 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -1335,7 +1335,6 @@ CONFIG_SYS_MEMORY_BASE
 CONFIG_SYS_MEMORY_SIZE
 CONFIG_SYS_MEM_RESERVE_SECURE
 CONFIG_SYS_MEM_SIZE
-CONFIG_SYS_MEM_TOP_HIDE
 CONFIG_SYS_MFD
 CONFIG_SYS_MHZ
 CONFIG_SYS_MIPS_TIMER_FREQ
