diff mbox series

imx: imx8mm_evk: Indent the config with tabs

Message ID 20260903000731.1091341-1-marex@nabladev.com
State New
Delegated to: Fabio Estevam
Headers show
Series imx: imx8mm_evk: Indent the config with tabs | expand

Commit Message

Marek Vasut Sept. 3, 2026, 12:07 a.m. UTC
Consistently indent the config header with tabs instead of a mix
of tabs and spaces. No functional change.

Signed-off-by: Marek Vasut <marex@nabladev.com>
---
Cc: "NXP i.MX U-Boot Team" <uboot-imx@nxp.com>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@nabladev.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: u-boot@lists.u-boot-project.org
---
 include/configs/imx8mm_evk.h | 22 +++++++++++-----------
 1 file changed, 11 insertions(+), 11 deletions(-)
diff mbox series

Patch

diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h
index 957d9c05083..36ee39746bd 100644
--- a/include/configs/imx8mm_evk.h
+++ b/include/configs/imx8mm_evk.h
@@ -11,33 +11,33 @@ 
 #include <asm/arch/imx-regs.h>
 
 #define UBOOT_ITB_OFFSET			0x57C00
-#define FSPI_CONF_BLOCK_SIZE		0x1000
-#define UBOOT_ITB_OFFSET_FSPI  \
+#define FSPI_CONF_BLOCK_SIZE			0x1000
+#define UBOOT_ITB_OFFSET_FSPI			\
 	(UBOOT_ITB_OFFSET + FSPI_CONF_BLOCK_SIZE)
 #ifdef CONFIG_FSPI_CONF_HEADER
-#define CFG_SYS_UBOOT_BASE  \
+#define CFG_SYS_UBOOT_BASE			\
 	(QSPI0_AMBA_BASE + UBOOT_ITB_OFFSET_FSPI)
 #else
-#define CFG_SYS_UBOOT_BASE	\
+#define CFG_SYS_UBOOT_BASE			\
 	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
 #endif
 
 #ifdef CONFIG_XPL_BUILD
 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
-#define CFG_MALLOC_F_ADDR		0x930000
+#define CFG_MALLOC_F_ADDR			0x930000
 /* For RAW image gives a error info not panic */
 
 #endif
 
 /* Link Definitions */
 
-#define CFG_SYS_INIT_RAM_ADDR        0x40000000
-#define CFG_SYS_INIT_RAM_SIZE        0x200000
+#define CFG_SYS_INIT_RAM_ADDR			0x40000000
+#define CFG_SYS_INIT_RAM_SIZE			0x200000
 
-#define CFG_SYS_SDRAM_BASE           0x40000000
-#define PHYS_SDRAM                      0x40000000
-#define PHYS_SDRAM_SIZE			0x80000000 /* 2GB DDR */
+#define CFG_SYS_SDRAM_BASE			0x40000000
+#define PHYS_SDRAM				0x40000000
+#define PHYS_SDRAM_SIZE				0x80000000	/* 2GB DDR */
 
-#define CFG_FEC_MXC_PHYADDR          0
+#define CFG_FEC_MXC_PHYADDR			0
 
 #endif