@@ -1089,6 +1089,7 @@ dtb-$(CONFIG_ARCH_MEDIATEK) += \
mt7988-rfb.dtb \
mt7988-sd-rfb.dtb \
mt8183-pumpkin.dtb \
+ mt8366-genio-360-evk.dtb \
mt8371-genio-520-evk.dtb \
mt8371-genio-520-evk-ufs.dtb \
mt8391-genio-720-evk.dtb \
new file mode 100644
@@ -0,0 +1,521 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/*
+ * Copyright (C) 2026 MediaTek Inc.
+ * Author: Macpaul Lin <macpaul.lin@mediatek.com>
+ */
+
+#include "mt8366.dtsi"
+#include "mt6366.dtsi"
+
+/ {
+ aliases {
+ ethernet0 = ð
+ mmc0 = &mmc0;
+ mmc1 = &mmc1;
+ };
+
+ memory@40000000 {
+ device_type = "memory";
+ /* 4GB */
+ reg = <0 0x40000000 0x1 0x00000000>;
+ };
+
+ firmware: firmware {
+ optee {
+ compatible = "linaro,optee-tz";
+ method = "smc";
+ };
+
+ psci: psci {
+ compatible = "arm,psci-1.0";
+ method = "smc";
+ };
+ };
+
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ /* 2 MiB reserved for ARM Trusted Firmware (BL31) */
+ bl31_secmon_reserved: secmon@54600000 {
+ no-map;
+ reg = <0 0x54600000 0x0 0x200000>;
+ };
+
+ /* 12 MiB reserved for OP-TEE (BL32)
+ * +-----------------------+ 0x43e0_0000
+ * | SHMEM 2MiB |
+ * +-----------------------+ 0x43c0_0000
+ * | | TA_RAM 8MiB |
+ * + TZDRAM +--------------+ 0x4340_0000
+ * | | TEE_RAM 2MiB |
+ * +-----------------------+ 0x4320_0000
+ */
+ optee_reserved: optee@43200000 {
+ no-map;
+ reg = <0 0x43200000 0 0x00c00000>;
+ };
+
+ dsi_reserved: dsi@60000000 {
+ reg = <0 0x60000000 0 0x02000000>;
+ no-map;
+ };
+ };
+
+ chosen {
+ stdout-path = &uart0;
+ };
+
+ usb_p0_vbus: regulator-usb-p0-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb-p0-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&pio 53 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ usb_p1_vbus: regulator-usb-p1-vbus {
+ compatible = "regulator-fixed";
+ regulator-name = "usb-p1-vbus";
+ regulator-min-microvolt = <5000000>;
+ regulator-max-microvolt = <5000000>;
+ gpio = <&pio 55 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ /*
+ * Panel VDD and IOVCC rails are switched by the same enable GPIO,
+ * so both -supply properties on the panel node point at this one
+ * regulator instead of duplicating the GPIO across two nodes. This
+ * works as long as we don't care what the voltage is. Technically,
+ * there are two separate regulators though.
+ */
+ regulator_dsi0_lcm: regulator-dsi0-lcm {
+ compatible = "regulator-fixed";
+ regulator-name = "dsi0-lcm";
+ pinctrl-names = "default";
+ pinctrl-0 = <&dsi0_lcm_pins_default>;
+ gpio = <&pio 119 GPIO_ACTIVE_HIGH>;
+ enable-active-high;
+ };
+
+ backlight_lcd0: backlight-lcd0 {
+ compatible = "pwm-backlight";
+ pwms = <&disp_pwm0 0 500000>;
+ brightness-levels = <0 1023>;
+ num-interpolated-steps = <1023>;
+ default-brightness-level = <576>;
+ };
+};
+
+&watchdog {
+ status = "okay";
+};
+
+&uart0 {
+ status = "okay";
+};
+
+&snor {
+ pinctrl-names = "default";
+ pinctrl-0 = <&snor_pins>;
+ status = "okay";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ reg = <0>;
+ spi-tx-bus-width = <4>;
+ spi-rx-bus-width = <4>;
+ };
+};
+
+&disp_pwm0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&disp_pwm0_pin_default>;
+};
+
+&dsi0 {
+ status = "okay";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ panel@0 {
+ compatible = "startek,kd070fhfid078", "himax,hx8279";
+ reg = <0>;
+ reset-gpios = <&pio 65 GPIO_ACTIVE_HIGH>;
+ enable-gpios = <&pio 63 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&panel0_pins_default>;
+ backlight = <&backlight_lcd0>;
+ vdd-supply = <®ulator_dsi0_lcm>;
+ iovcc-supply = <®ulator_dsi0_lcm>;
+ status = "okay";
+
+ port {
+ panel0_in: endpoint {
+ remote-endpoint = <&dsi0_out>;
+ };
+ };
+ };
+
+ port {
+ dsi0_out: endpoint {
+ remote-endpoint = <&panel0_in>;
+ };
+ };
+};
+
+&mipi_tx_config0 {
+ status = "okay";
+};
+
+&mutex0 {
+ status = "okay";
+};
+
+&disp_ovl0_4l {
+ status = "okay";
+};
+
+&disp_rdma0 {
+ status = "okay";
+};
+
+&smi_larb0 {
+ status = "okay";
+};
+
+&smi_disp_common {
+ status = "okay";
+};
+
+&pio {
+ disp_pwm0_pin_default: disp-pwm0-pins {
+ pins {
+ pinmux = <PINMUX_GPIO64__FUNC_DISP_PWM0>;
+ output-high;
+ };
+ };
+
+ panel0_pins_default: panel0-pins {
+ pins {
+ pinmux = <PINMUX_GPIO63__FUNC_GPIO63>,
+ <PINMUX_GPIO65__FUNC_GPIO65>;
+ output-high;
+ };
+ };
+
+ mmc0_pins_default: mmc0-default-pins {
+ pins-clk {
+ pinmux = <PINMUX_GPIO123__FUNC_MSDC0_CLK>;
+ drive-strength = <MTK_DRIVE_4mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
+ };
+
+ pins-cmd-dat {
+ pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>,
+ <PINMUX_GPIO127__FUNC_MSDC0_DAT1>,
+ <PINMUX_GPIO128__FUNC_MSDC0_DAT2>,
+ <PINMUX_GPIO129__FUNC_MSDC0_DAT3>,
+ <PINMUX_GPIO130__FUNC_MSDC0_DAT4>,
+ <PINMUX_GPIO131__FUNC_MSDC0_DAT5>,
+ <PINMUX_GPIO132__FUNC_MSDC0_DAT6>,
+ <PINMUX_GPIO133__FUNC_MSDC0_DAT7>,
+ <PINMUX_GPIO124__FUNC_MSDC0_CMD>;
+ input-enable;
+ drive-strength = <MTK_DRIVE_4mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
+ };
+
+ pins-ds {
+ pinmux = <PINMUX_GPIO122__FUNC_MSDC0_DSL>;
+ drive-strength = <MTK_DRIVE_4mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
+ };
+
+ pins-rst {
+ pinmux = <PINMUX_GPIO125__FUNC_MSDC0_RSTB>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
+ };
+ };
+
+ mmc0_pins_uhs: mmc0-uhs-pins {
+ pins-clk {
+ pinmux = <PINMUX_GPIO123__FUNC_MSDC0_CLK>;
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
+ };
+
+ pins-cmd-dat {
+ pinmux = <PINMUX_GPIO126__FUNC_MSDC0_DAT0>,
+ <PINMUX_GPIO127__FUNC_MSDC0_DAT1>,
+ <PINMUX_GPIO128__FUNC_MSDC0_DAT2>,
+ <PINMUX_GPIO129__FUNC_MSDC0_DAT3>,
+ <PINMUX_GPIO130__FUNC_MSDC0_DAT4>,
+ <PINMUX_GPIO131__FUNC_MSDC0_DAT5>,
+ <PINMUX_GPIO132__FUNC_MSDC0_DAT6>,
+ <PINMUX_GPIO133__FUNC_MSDC0_DAT7>,
+ <PINMUX_GPIO124__FUNC_MSDC0_CMD>;
+ input-enable;
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
+ };
+
+ pins-ds {
+ pinmux = <PINMUX_GPIO122__FUNC_MSDC0_DSL>;
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
+ };
+
+ pins-rst {
+ pinmux = <PINMUX_GPIO125__FUNC_MSDC0_RSTB>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
+ };
+ };
+
+ mmc1_pins_default: mmc1-default-pins {
+ pins-clk {
+ pinmux = <PINMUX_GPIO134__FUNC_MSDC1_CLK>;
+ drive-strength = <MTK_DRIVE_4mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
+ };
+
+ pins-cmd-dat {
+ pinmux = <PINMUX_GPIO136__FUNC_MSDC1_DAT0>,
+ <PINMUX_GPIO137__FUNC_MSDC1_DAT1>,
+ <PINMUX_GPIO138__FUNC_MSDC1_DAT2>,
+ <PINMUX_GPIO139__FUNC_MSDC1_DAT3>,
+ <PINMUX_GPIO135__FUNC_MSDC1_CMD>;
+ input-enable;
+ drive-strength = <MTK_DRIVE_4mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
+ };
+
+ pins-insert {
+ pinmux = <PINMUX_GPIO94__FUNC_GPIO94>;
+ bias-pull-up;
+ };
+ };
+
+ mmc1_pins_uhs: mmc1-uhs-pins {
+ pins-clk {
+ pinmux = <PINMUX_GPIO134__FUNC_MSDC1_CLK>;
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
+ };
+
+ pins-cmd-dat {
+ pinmux = <PINMUX_GPIO136__FUNC_MSDC1_DAT0>,
+ <PINMUX_GPIO137__FUNC_MSDC1_DAT1>,
+ <PINMUX_GPIO138__FUNC_MSDC1_DAT2>,
+ <PINMUX_GPIO139__FUNC_MSDC1_DAT3>,
+ <PINMUX_GPIO135__FUNC_MSDC1_CMD>;
+ input-enable;
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
+ };
+ };
+
+ usb0_default_pins: usb0-default-pins {
+ pins-vbus-valid {
+ pinmux = <PINMUX_GPIO54__FUNC_VBUSVALID>;
+ };
+ };
+
+ dsi0_lcm_pins_default: dsi0-lcm-pins {
+ pins {
+ pinmux = <PINMUX_GPIO119__FUNC_GPIO119>;
+ output-high;
+ };
+ };
+
+ snor_pins: snor-pins {
+ pins-ck-io {
+ pinmux = <PINMUX_GPIO57__FUNC_SPINOR_CK>,
+ <PINMUX_GPIO59__FUNC_SPINOR_IO0>,
+ <PINMUX_GPIO60__FUNC_SPINOR_IO1>;
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-down;
+ };
+
+ pins-cs {
+ pinmux = <PINMUX_GPIO58__FUNC_SPINOR_CS>,
+ <PINMUX_GPIO61__FUNC_SPINOR_IO2>,
+ <PINMUX_GPIO62__FUNC_SPINOR_IO3>;
+ drive-strength = <MTK_DRIVE_8mA>;
+ bias-pull-up;
+ };
+ };
+
+ eth_default: eth-default-pins {
+ pins-txd {
+ pinmux = <PINMUX_GPIO12__FUNC_GBE_TXD3>,
+ <PINMUX_GPIO13__FUNC_GBE_TXD2>,
+ <PINMUX_GPIO14__FUNC_GBE_TXD1>,
+ <PINMUX_GPIO15__FUNC_GBE_TXD0>;
+ drive-strength = <MTK_DRIVE_8mA>;
+ };
+
+ pins-cc {
+ pinmux = <PINMUX_GPIO20__FUNC_GBE_TXC>,
+ <PINMUX_GPIO23__FUNC_GBE_TXEN>,
+ <PINMUX_GPIO22__FUNC_GBE_RXDV>,
+ <PINMUX_GPIO21__FUNC_GBE_RXC>;
+ drive-strength = <MTK_DRIVE_8mA>;
+ };
+
+ pins-rxd {
+ pinmux = <PINMUX_GPIO16__FUNC_GBE_RXD3>,
+ <PINMUX_GPIO17__FUNC_GBE_RXD2>,
+ <PINMUX_GPIO18__FUNC_GBE_RXD1>,
+ <PINMUX_GPIO19__FUNC_GBE_RXD0>;
+ drive-strength = <MTK_DRIVE_8mA>;
+ };
+
+ pins-mdio {
+ pinmux = <PINMUX_GPIO24__FUNC_GBE_MDC>,
+ <PINMUX_GPIO25__FUNC_GBE_MDIO>;
+ drive-strength = <MTK_DRIVE_8mA>;
+ input-enable;
+ };
+
+ pins-power {
+ pinmux = <PINMUX_GPIO27__FUNC_GPIO27>,
+ <PINMUX_GPIO26__FUNC_GPIO26>;
+ output-high;
+ };
+
+ pins-reset {
+ pinmux = <PINMUX_GPIO28__FUNC_GPIO28>;
+ };
+ };
+
+ eth_sleep: eth-sleep-pins {
+ pins-txd {
+ pinmux = <PINMUX_GPIO12__FUNC_GPIO12>,
+ <PINMUX_GPIO13__FUNC_GPIO13>,
+ <PINMUX_GPIO14__FUNC_GPIO14>,
+ <PINMUX_GPIO15__FUNC_GPIO15>;
+ };
+
+ pins-cc {
+ pinmux = <PINMUX_GPIO20__FUNC_GPIO20>,
+ <PINMUX_GPIO23__FUNC_GPIO23>,
+ <PINMUX_GPIO22__FUNC_GPIO22>,
+ <PINMUX_GPIO21__FUNC_GPIO21>;
+ };
+
+ pins-rxd {
+ pinmux = <PINMUX_GPIO16__FUNC_GPIO16>,
+ <PINMUX_GPIO17__FUNC_GPIO17>,
+ <PINMUX_GPIO18__FUNC_GPIO18>,
+ <PINMUX_GPIO19__FUNC_GPIO19>;
+ };
+
+ pins-mdio {
+ pinmux = <PINMUX_GPIO24__FUNC_GPIO24>,
+ <PINMUX_GPIO25__FUNC_GPIO25>;
+ input-disable;
+ bias-disable;
+ };
+ };
+};
+
+&ssusb {
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb0_default_pins>;
+ role-switch-default-mode = "peripheral";
+ wakeup-source;
+ status = "okay";
+};
+
+&usb_host0 {
+ status = "okay";
+};
+
+&usb_host1 {
+ vbus-supply = <&usb_p1_vbus>;
+ wakeup-source;
+ status = "okay";
+};
+
+&usb_host2 {
+ status = "okay";
+};
+
+&u3phy0 {
+ status = "okay";
+};
+
+&u2phy1 {
+ status = "okay";
+};
+
+&u2phy2 {
+ status = "okay";
+};
+
+&mmc0 {
+ status = "okay";
+ pinctrl-names = "default", "state_uhs";
+ pinctrl-0 = <&mmc0_pins_default>;
+ pinctrl-1 = <&mmc0_pins_uhs>;
+ bus-width = <8>;
+ max-frequency = <200000000>;
+ cap-mmc-highspeed;
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
+ supports-cqe;
+ mmc-hs400-enhanced-strobe;
+ hs400-ds-delay = <0x10100>;
+ cap-mmc-hw-reset;
+ vmmc-supply = <&mt6366_vemc_reg>;
+ vqmmc-supply = <&mt6366_vio18_reg>;
+ no-sdio;
+ no-sd;
+ non-removable;
+};
+
+&mmc1 {
+ status = "okay";
+ pinctrl-names = "default", "state_uhs";
+ pinctrl-0 = <&mmc1_pins_default>;
+ pinctrl-1 = <&mmc1_pins_uhs>;
+ bus-width = <4>;
+ max-frequency = <200000000>;
+ cap-sd-highspeed;
+ sd-uhs-sdr50;
+ sd-uhs-sdr104;
+ cd-gpios = <&pio 94 GPIO_ACTIVE_LOW>;
+ vmmc-supply = <&mt6366_vmch_reg>;
+ vqmmc-supply = <&mt6366_vmc_reg>;
+ no-sdio;
+ no-mmc;
+};
+
+ð {
+ /* The TX clock delay is provided by the board, only RX needs an ID. */
+ phy-mode = "rgmii-rxid";
+ phy-handle = <&phy>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <ð_default>;
+ pinctrl-1 = <ð_sleep>;
+ status = "okay";
+
+ mdio {
+ compatible = "snps,dwmac-mdio";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ phy: ethernet-phy@0 {
+ compatible = "ethernet-phy-idc0ff.0421";
+ reg = <0>;
+ reset-gpios = <&pio 28 GPIO_ACTIVE_LOW>;
+ reset-assert-us = <10000>;
+ reset-deassert-us = <10000>;
+ };
+ };
+};
new file mode 100644
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: GPL-2.0-only OR MIT
+/*
+ * Copyright (C) 2026 MediaTek Inc.
+ * Author: Macpaul Lin <macpaul.lin@mediatek.com>
+ */
+
+/dts-v1/;
+
+#include "mt8366-genio-360-evk-common.dtsi"
+
+/ {
+ model = "MediaTek Genio-360 EVK";
+ compatible = "mediatek,genio-360-evk", "mediatek,mt8366";
+};