diff mbox series

[13/16] spacemit: k1: append RISCV_MMODE_TIMERBASE

Message ID 20260422143112.1329478-14-raymondmaoca@gmail.com
State New
Delegated to: Andes
Headers show
Series Add PIN and SPI support for Spacemit K1 | expand

Commit Message

Raymond Mao April 22, 2026, 2:31 p.m. UTC 
From: Raymond Mao <raymond.mao@riscstar.com>

Append the definition of RISCV_MMODE_TIMER_BASE & RISCV_MMODE_TIMEROFF.
Since they're required by riscv aclint timer.

Signed-off-by: Raymond Mao <raymond.mao@riscstar.com>
---
 include/configs/k1.h | 12 +++++++-----
 1 file changed, 7 insertions(+), 5 deletions(-)
diff mbox series

Patch

diff --git a/include/configs/k1.h b/include/configs/k1.h
index 8e148803dea..33cbbeb6fd6 100644
--- a/include/configs/k1.h
+++ b/include/configs/k1.h
@@ -8,12 +8,14 @@ 
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CFG_SYS_SDRAM_BASE	    0x0
+#define CFG_SYS_SDRAM_BASE		0x0
 
-#define CFG_SYS_NS16550_CLK	    14700000
-#define CFG_SYS_NS16550_IER	    0x40 /* UART Unit Enable */
+#define CFG_SYS_NS16550_CLK		14700000
+#define CFG_SYS_NS16550_IER		0x40 /* UART Unit Enable */
 
-#define RISCV_MMODE_TIMER_FREQ	    24000000
-#define RISCV_SMODE_TIMER_FREQ	    24000000
+#define RISCV_MMODE_TIMERBASE		0xe4000000
+#define RISCV_MMODE_TIMEROFF		0xbff8
+#define RISCV_MMODE_TIMER_FREQ		24000000
+#define RISCV_SMODE_TIMER_FREQ		24000000
 
 #endif /* __CONFIG_H */