| Message ID | 20250512172149.150214-6-marek.vasut@mailbox.org |
|---|---|
| State | New |
| Delegated to: | Patrice Chotard |
| Headers | show |
| Series | ARM: stm32: Add STM32MP13xx SPL and OpTee-OS start support | expand |
On 5/12/25 19:21, Marek Vasut wrote: > Add default STM32MP13xx debug UART initialization. This is similar > to STM32MP15xx debug UART initialization, except the RCC registers > are at different offsets and the UART pinmux pins are different. > > Signed-off-by: Marek Vasut <marek.vasut@mailbox.org> > --- > Cc: Cheick Traore <cheick.traore@foss.st.com> > Cc: Fabrice Gasnier <fabrice.gasnier@foss.st.com> > Cc: Gatien Chevallier <gatien.chevallier@foss.st.com> > Cc: Lionel Debieve <lionel.debieve@foss.st.com> > Cc: Pascal Zimmermann <pzimmermann@dh-electronics.com> > Cc: Patrice Chotard <patrice.chotard@foss.st.com> > Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> > Cc: Simon Glass <sjg@chromium.org> > Cc: Sughosh Ganu <sughosh.ganu@linaro.org> > Cc: Tom Rini <trini@konsulko.com> > Cc: u-boot@dh-electronics.com > Cc: u-boot@lists.denx.de > Cc: uboot-stm32@st-md-mailman.stormreply.com > --- > board/st/stm32mp1/debug_uart.c | 21 ++++++++++++++++++--- > 1 file changed, 18 insertions(+), 3 deletions(-) > > diff --git a/board/st/stm32mp1/debug_uart.c b/board/st/stm32mp1/debug_uart.c > index 24e3f9f2201..4c2149e0480 100644 > --- a/board/st/stm32mp1/debug_uart.c > +++ b/board/st/stm32mp1/debug_uart.c > @@ -9,17 +9,32 @@ > #include <asm/arch/stm32.h> > #include <linux/bitops.h> > > +#if IS_ENABLED(CONFIG_STM32MP13X) > +#define RCC_MP_APB1ENSETR (STM32_RCC_BASE + 0x0700) > +#define RCC_MP_AHB4ENSETR (STM32_RCC_BASE + 0x0768) > +#elif IS_ENABLED(CONFIG_STM32MP15X) > #define RCC_MP_APB1ENSETR (STM32_RCC_BASE + 0x0A00) > #define RCC_MP_AHB4ENSETR (STM32_RCC_BASE + 0x0A28) > +#endif > > +#define GPIOA_BASE 0x50002000 > #define GPIOG_BASE 0x50008000 > > void board_debug_uart_init(void) > { > - if (CONFIG_DEBUG_UART_BASE == STM32_UART4_BASE) { > - /* UART4 clock enable */ > - setbits_le32(RCC_MP_APB1ENSETR, BIT(16)); > + if (CONFIG_DEBUG_UART_BASE != STM32_UART4_BASE) > + return; > > + /* UART4 clock enable */ > + setbits_le32(RCC_MP_APB1ENSETR, BIT(16)); > + > + if (IS_ENABLED(CONFIG_STM32MP13X)) { > + /* GPIOA clock enable */ > + writel(BIT(0), RCC_MP_AHB4ENSETR); > + /* GPIO configuration for DH boards: Uart4 TX = A9 */ > + writel(0xfffbffff, GPIOA_BASE + 0x00); > + writel(0x00000080, GPIOA_BASE + 0x24); > + } else if (IS_ENABLED(CONFIG_STM32MP15X)) { > /* GPIOG clock enable */ > writel(BIT(6), RCC_MP_AHB4ENSETR); > /* GPIO configuration for ST boards: Uart4 TX = G11 */ Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Thanks Patrice
On 5/12/25 19:21, Marek Vasut wrote: > Add default STM32MP13xx debug UART initialization. This is similar > to STM32MP15xx debug UART initialization, except the RCC registers > are at different offsets and the UART pinmux pins are different. > > Signed-off-by: Marek Vasut <marek.vasut@mailbox.org> > --- > Cc: Cheick Traore <cheick.traore@foss.st.com> > Cc: Fabrice Gasnier <fabrice.gasnier@foss.st.com> > Cc: Gatien Chevallier <gatien.chevallier@foss.st.com> > Cc: Lionel Debieve <lionel.debieve@foss.st.com> > Cc: Pascal Zimmermann <pzimmermann@dh-electronics.com> > Cc: Patrice Chotard <patrice.chotard@foss.st.com> > Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> > Cc: Simon Glass <sjg@chromium.org> > Cc: Sughosh Ganu <sughosh.ganu@linaro.org> > Cc: Tom Rini <trini@konsulko.com> > Cc: u-boot@dh-electronics.com > Cc: u-boot@lists.denx.de > Cc: uboot-stm32@st-md-mailman.stormreply.com > --- > board/st/stm32mp1/debug_uart.c | 21 ++++++++++++++++++--- > 1 file changed, 18 insertions(+), 3 deletions(-) > Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Thanks Patrick
diff --git a/board/st/stm32mp1/debug_uart.c b/board/st/stm32mp1/debug_uart.c index 24e3f9f2201..4c2149e0480 100644 --- a/board/st/stm32mp1/debug_uart.c +++ b/board/st/stm32mp1/debug_uart.c @@ -9,17 +9,32 @@ #include <asm/arch/stm32.h> #include <linux/bitops.h> +#if IS_ENABLED(CONFIG_STM32MP13X) +#define RCC_MP_APB1ENSETR (STM32_RCC_BASE + 0x0700) +#define RCC_MP_AHB4ENSETR (STM32_RCC_BASE + 0x0768) +#elif IS_ENABLED(CONFIG_STM32MP15X) #define RCC_MP_APB1ENSETR (STM32_RCC_BASE + 0x0A00) #define RCC_MP_AHB4ENSETR (STM32_RCC_BASE + 0x0A28) +#endif +#define GPIOA_BASE 0x50002000 #define GPIOG_BASE 0x50008000 void board_debug_uart_init(void) { - if (CONFIG_DEBUG_UART_BASE == STM32_UART4_BASE) { - /* UART4 clock enable */ - setbits_le32(RCC_MP_APB1ENSETR, BIT(16)); + if (CONFIG_DEBUG_UART_BASE != STM32_UART4_BASE) + return; + /* UART4 clock enable */ + setbits_le32(RCC_MP_APB1ENSETR, BIT(16)); + + if (IS_ENABLED(CONFIG_STM32MP13X)) { + /* GPIOA clock enable */ + writel(BIT(0), RCC_MP_AHB4ENSETR); + /* GPIO configuration for DH boards: Uart4 TX = A9 */ + writel(0xfffbffff, GPIOA_BASE + 0x00); + writel(0x00000080, GPIOA_BASE + 0x24); + } else if (IS_ENABLED(CONFIG_STM32MP15X)) { /* GPIOG clock enable */ writel(BIT(6), RCC_MP_AHB4ENSETR); /* GPIO configuration for ST boards: Uart4 TX = G11 */
Add default STM32MP13xx debug UART initialization. This is similar to STM32MP15xx debug UART initialization, except the RCC registers are at different offsets and the UART pinmux pins are different. Signed-off-by: Marek Vasut <marek.vasut@mailbox.org> --- Cc: Cheick Traore <cheick.traore@foss.st.com> Cc: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Cc: Gatien Chevallier <gatien.chevallier@foss.st.com> Cc: Lionel Debieve <lionel.debieve@foss.st.com> Cc: Pascal Zimmermann <pzimmermann@dh-electronics.com> Cc: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Patrick Delaunay <patrick.delaunay@foss.st.com> Cc: Simon Glass <sjg@chromium.org> Cc: Sughosh Ganu <sughosh.ganu@linaro.org> Cc: Tom Rini <trini@konsulko.com> Cc: u-boot@dh-electronics.com Cc: u-boot@lists.denx.de Cc: uboot-stm32@st-md-mailman.stormreply.com --- board/st/stm32mp1/debug_uart.c | 21 ++++++++++++++++++--- 1 file changed, 18 insertions(+), 3 deletions(-)