diff mbox series

[v1,1/3] riscv: image: Add new image type for RV64

Message ID 20250311133506.124914-2-mchitale@ventanamicro.com
State Changes Requested
Delegated to: Andes
Headers show
Series Risc-V 32 bit/64 bit images | expand

Commit Message

Mayuresh Chitale March 11, 2025, 1:35 p.m. UTC
Similar to ARM and X86, introduce a new image type which allows u-boot
to distinguish between images built for 32-bit vs 64-bit Risc-V CPUs.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
---
 boot/image.c    | 3 ++-
 include/image.h | 1 +
 2 files changed, 3 insertions(+), 1 deletion(-)

Comments

Максим Москалец March 12, 2025, 11:51 a.m. UTC | #1
вт, 11 мар. 2025 г. в 16:35, Mayuresh Chitale <mchitale@ventanamicro.com>:

> Similar to ARM and X86, introduce a new image type which allows u-boot
> to distinguish between images built for 32-bit vs 64-bit Risc-V CPUs.
>
> Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
> ---
>  boot/image.c    | 3 ++-
>  include/image.h | 1 +
>  2 files changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/boot/image.c b/boot/image.c
> index abac254e026..03d5e59b634 100644
> --- a/boot/image.c
> +++ b/boot/image.c
> @@ -92,7 +92,8 @@ static const table_entry_t uimage_arch[] = {
>         {       IH_ARCH_ARC,            "arc",          "ARC",          },
>         {       IH_ARCH_X86_64,         "x86_64",       "AMD x86_64",   },
>         {       IH_ARCH_XTENSA,         "xtensa",       "Xtensa",       },
> -       {       IH_ARCH_RISCV,          "riscv",        "RISC-V",       },
> +       {       IH_ARCH_RISCV,          "riscv",        "RISC-V 32 Bit",},
> +       {       IH_ARCH_RISCV64,        "riscv64",      "RISC-V 64 Bit",},
>         {       -1,                     "",             "",             },
>  };
>
> diff --git a/include/image.h b/include/image.h
> index 8a9f779d3ff..12b31166e86 100644
> --- a/include/image.h
> +++ b/include/image.h
> @@ -139,6 +139,7 @@ enum {
>         IH_ARCH_X86_64,                 /* AMD x86_64, Intel and Via */
>         IH_ARCH_XTENSA,                 /* Xtensa       */
>         IH_ARCH_RISCV,                  /* RISC-V */
>

I believe s/RISC-V/RISC-V 32 bit/ is more explicit.
Looks good.

Reviewed-by: Maxim Moskalets <maximmosk4@gmail.com>


> +       IH_ARCH_RISCV64,                /* RISC-V 64 bit*/
>
>         IH_ARCH_COUNT,
>  };
> --
> 2.43.0
>
>
Mayuresh Chitale April 3, 2025, 10:56 a.m. UTC | #2
On Wed, Mar 12, 2025 at 5:21 PM Максим Москалец <maximmosk4@gmail.com> wrote:
>
>
>
> вт, 11 мар. 2025 г. в 16:35, Mayuresh Chitale <mchitale@ventanamicro.com>:
>>
>> Similar to ARM and X86, introduce a new image type which allows u-boot
>> to distinguish between images built for 32-bit vs 64-bit Risc-V CPUs.
>>
>> Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
>> ---
>>  boot/image.c    | 3 ++-
>>  include/image.h | 1 +
>>  2 files changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git a/boot/image.c b/boot/image.c
>> index abac254e026..03d5e59b634 100644
>> --- a/boot/image.c
>> +++ b/boot/image.c
>> @@ -92,7 +92,8 @@ static const table_entry_t uimage_arch[] = {
>>         {       IH_ARCH_ARC,            "arc",          "ARC",          },
>>         {       IH_ARCH_X86_64,         "x86_64",       "AMD x86_64",   },
>>         {       IH_ARCH_XTENSA,         "xtensa",       "Xtensa",       },
>> -       {       IH_ARCH_RISCV,          "riscv",        "RISC-V",       },
>> +       {       IH_ARCH_RISCV,          "riscv",        "RISC-V 32 Bit",},
>> +       {       IH_ARCH_RISCV64,        "riscv64",      "RISC-V 64 Bit",},
>>         {       -1,                     "",             "",             },
>>  };
>>
>> diff --git a/include/image.h b/include/image.h
>> index 8a9f779d3ff..12b31166e86 100644
>> --- a/include/image.h
>> +++ b/include/image.h
>> @@ -139,6 +139,7 @@ enum {
>>         IH_ARCH_X86_64,                 /* AMD x86_64, Intel and Via */
>>         IH_ARCH_XTENSA,                 /* Xtensa       */
>>         IH_ARCH_RISCV,                  /* RISC-V */
>
>
> I believe s/RISC-V/RISC-V 32 bit/ is more explicit.
> Looks good.
>
> Reviewed-by: Maxim Moskalets <maximmosk4@gmail.com>
Thanks. I will update the patch.
>
>>
>> +       IH_ARCH_RISCV64,                /* RISC-V 64 bit*/
>>
>>         IH_ARCH_COUNT,
>>  };
>> --
>> 2.43.0
>>
diff mbox series

Patch

diff --git a/boot/image.c b/boot/image.c
index abac254e026..03d5e59b634 100644
--- a/boot/image.c
+++ b/boot/image.c
@@ -92,7 +92,8 @@  static const table_entry_t uimage_arch[] = {
 	{	IH_ARCH_ARC,		"arc",		"ARC",		},
 	{	IH_ARCH_X86_64,		"x86_64",	"AMD x86_64",	},
 	{	IH_ARCH_XTENSA,		"xtensa",	"Xtensa",	},
-	{	IH_ARCH_RISCV,		"riscv",	"RISC-V",	},
+	{	IH_ARCH_RISCV,		"riscv",	"RISC-V 32 Bit",},
+	{	IH_ARCH_RISCV64,	"riscv64",	"RISC-V 64 Bit",},
 	{	-1,			"",		"",		},
 };
 
diff --git a/include/image.h b/include/image.h
index 8a9f779d3ff..12b31166e86 100644
--- a/include/image.h
+++ b/include/image.h
@@ -139,6 +139,7 @@  enum {
 	IH_ARCH_X86_64,			/* AMD x86_64, Intel and Via */
 	IH_ARCH_XTENSA,			/* Xtensa	*/
 	IH_ARCH_RISCV,			/* RISC-V */
+	IH_ARCH_RISCV64,		/* RISC-V 64 bit*/
 
 	IH_ARCH_COUNT,
 };