diff mbox series

[RFC,1/3] riscv: image: Add new image type for RV64

Message ID 20250221125855.300717-2-mchitale@ventanamicro.com
State RFC
Delegated to: Andes
Headers show
Series Risc-V 32 bit/64 bit images | expand

Commit Message

Mayuresh Chitale Feb. 21, 2025, 12:58 p.m. UTC 
Similar to ARM and X86, introduce a new image type which allows u-boot
to distinguish between images built for 32-bit vs 64-bit Risc-V CPUs.

Signed-off-by: Mayuresh Chitale <mchitale@ventanamicro.com>
---
 boot/image.c    | 3 ++-
 include/image.h | 1 +
 2 files changed, 3 insertions(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/boot/image.c b/boot/image.c
index abac254e026..03d5e59b634 100644
--- a/boot/image.c
+++ b/boot/image.c
@@ -92,7 +92,8 @@  static const table_entry_t uimage_arch[] = {
 	{	IH_ARCH_ARC,		"arc",		"ARC",		},
 	{	IH_ARCH_X86_64,		"x86_64",	"AMD x86_64",	},
 	{	IH_ARCH_XTENSA,		"xtensa",	"Xtensa",	},
-	{	IH_ARCH_RISCV,		"riscv",	"RISC-V",	},
+	{	IH_ARCH_RISCV,		"riscv",	"RISC-V 32 Bit",},
+	{	IH_ARCH_RISCV64,	"riscv64",	"RISC-V 64 Bit",},
 	{	-1,			"",		"",		},
 };
 
diff --git a/include/image.h b/include/image.h
index 8a9f779d3ff..12b31166e86 100644
--- a/include/image.h
+++ b/include/image.h
@@ -139,6 +139,7 @@  enum {
 	IH_ARCH_X86_64,			/* AMD x86_64, Intel and Via */
 	IH_ARCH_XTENSA,			/* Xtensa	*/
 	IH_ARCH_RISCV,			/* RISC-V */
+	IH_ARCH_RISCV64,		/* RISC-V 64 bit*/
 
 	IH_ARCH_COUNT,
 };