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[2/2] misc: ele_mu: Clear RR when initialize MU

Message ID 20241006002252.14895-2-peng.fan@oss.nxp.com
State Accepted
Commit e7431340743962b4cfaffda95016c55bd2df297a
Delegated to: Fabio Estevam
Headers show
Series [1/2] misc: ele_mu: Update ELE MU to get TR/RR number from HW | expand

Commit Message

Peng Fan (OSS) Oct. 6, 2024, 12:22 a.m. UTC
From: Peng Fan <peng.fan@nxp.com>

When OS is doing ELE API call, before OS get the response, OS is force
reseted, then it is possible that MU RR has data during initialization
in SPL stage. So clear the RR registers, otherwise SPL ELE API call will
work abnormal.

Cc: Alice Guo <alice.guo@nxp.com>
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
---
 drivers/misc/imx_ele/ele_mu.c | 11 +++++++++++
 1 file changed, 11 insertions(+)
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Patch

diff --git a/drivers/misc/imx_ele/ele_mu.c b/drivers/misc/imx_ele/ele_mu.c
index f5ba3a4ffa5..cdb85b999db 100644
--- a/drivers/misc/imx_ele/ele_mu.c
+++ b/drivers/misc/imx_ele/ele_mu.c
@@ -25,9 +25,20 @@  struct imx8ulp_mu {
 void mu_hal_init(ulong base)
 {
 	struct mu_type *mu_base = (struct mu_type *)base;
+	u32 rr_num = (readl(&mu_base->par) & 0xFF00) >> 8;
+	int i;
 
 	writel(0, &mu_base->tcr);
 	writel(0, &mu_base->rcr);
+
+	while (true) {
+		/* If there is pending RX data, clear them by read them out */
+		if (!(readl(&mu_base->sr) & BIT(6)))
+			return;
+
+		for (i = 0; i < rr_num; i++)
+			readl(&mu_base->rr[i]);
+	}
 }
 
 int mu_hal_sendmsg(ulong base, u32 reg_index, u32 msg)