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[188.129.46.59]) by smtp.googlemail.com with ESMTPSA id s20-20020a170906455400b00a59c4a16e4asm2878350ejq.120.2024.05.07.03.04.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 07 May 2024 03:04:37 -0700 (PDT) From: Robert Marko To: sjg@chromium.org, trini@konsulko.com, jagan@amarulasolutions.com, vigneshr@ti.com, marek.vasut+renesas@mailbox.org, u-boot@lists.denx.de Cc: j.beck@linefinity.com, Robert Marko Subject: [RFC PATCH 4/5] mtd: spi: sf: implement .on_reset method Date: Tue, 7 May 2024 12:03:52 +0200 Message-ID: <20240507100431.206670-5-robert.marko@sartura.hr> X-Mailer: git-send-email 2.45.0 In-Reply-To: <20240507100431.206670-1-robert.marko@sartura.hr> References: <20240507100431.206670-1-robert.marko@sartura.hr> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Implement .on_reset method for SPI flash, by extending the remove method to exit 4-byte adressing mode in case it was entered before. This fixes the issue with 4-byte adressing mode being left enabled on board reset. That is an issue on Qualcomm IPQ4019 boards since the CPU expects flash to be in 3-byte adressing mode and will just hang otherwise. Note that this does not fix a case where you remove the power while U-Boot is still running and in that case it will still be stuck in 4-byte mode. Signed-off-by: Robert Marko --- drivers/mtd/spi/sf_probe.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/mtd/spi/sf_probe.c b/drivers/mtd/spi/sf_probe.c index de6516f106..31dae17ba0 100644 --- a/drivers/mtd/spi/sf_probe.c +++ b/drivers/mtd/spi/sf_probe.c @@ -225,6 +225,15 @@ static int spi_flash_std_remove(struct udevice *dev) struct spi_flash *flash = dev_get_uclass_priv(dev); int ret; + if (flash->addr_width == 4 && + !(flash->info->flags & SPI_NOR_OCTAL_DTR_READ) && + (JEDEC_MFR(flash->info) != SNOR_MFR_SPANSION) && + !(flash->flags & SNOR_F_4B_OPCODES)) { + ret = spi_nor_set_4byte(flash, flash->info, 0); + if (ret) + return ret; + } + if (CONFIG_IS_ENABLED(SPI_DIRMAP)) { spi_mem_dirmap_destroy(flash->dirmap.wdesc); spi_mem_dirmap_destroy(flash->dirmap.rdesc); @@ -258,6 +267,7 @@ U_BOOT_DRIVER(jedec_spi_nor) = { .of_match = spi_flash_std_ids, .probe = spi_flash_std_probe, .remove = spi_flash_std_remove, + .on_reset = spi_flash_std_remove, .priv_auto = sizeof(struct spi_nor), .ops = &spi_flash_std_ops, .flags = DM_FLAG_OS_PREPARE,