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Kornilov" , Jonas Karlman Cc: u-boot@lists.denx.de Subject: [PATCH] rockchip: rk3328: Add missing bootph-some-ram props Date: Wed, 1 May 2024 19:21:24 +0000 Message-ID: <20240501192127.962261-1-jonas@kwiboo.se> X-Mailer: git-send-email 2.43.2 MIME-Version: 1.0 X-Report-Abuse-To: abuse@forwardemail.net X-Report-Abuse: abuse@forwardemail.net X-Complaints-To: abuse@forwardemail.net X-ForwardEmail-Version: 0.4.40 X-ForwardEmail-Sender: rfc822; jonas@kwiboo.se, smtp.forwardemail.net, 149.28.215.223 X-ForwardEmail-ID: 6632963c4c2a88c85b8058e0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Add bootph-some-ram props to pinctrl nodes related to eMMC, SD-card and SPI flash to match e.g. RK3308 and RK3399. Also adjust bootph props for sdio_vcc_pin, pinctrl and uart2m1_xfer. Fixes: 1e21f5693045 ("rockchip: rk3328: Fix loading FIT from SD-card when booting from eMMC") Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang --- This has been runtime tested on a Rock64 and NanoPi R2S Plus. The uart2m1_xfer change help speed up boot by around 100 ms. --- arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi | 2 +- .../rk3328-orangepi-r1-plus-lts-u-boot.dtsi | 7 ++++--- .../dts/rk3328-orangepi-r1-plus-u-boot.dtsi | 7 ++++--- arch/arm/dts/rk3328-rock64-u-boot.dtsi | 7 ++++--- arch/arm/dts/rk3328-u-boot.dtsi | 20 +++++++++++++++---- 5 files changed, 29 insertions(+), 14 deletions(-) diff --git a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi index 4fa170eeaf8d..d8c79600b659 100644 --- a/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi +++ b/arch/arm/dts/rk3328-nanopi-r2s-u-boot.dtsi @@ -12,7 +12,7 @@ }; &sdio_vcc_pin { - bootph-all; + bootph-pre-ram; }; &usb20_otg { diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi index 0a9423cd9c7e..b50c1332b836 100644 --- a/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi +++ b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi @@ -8,9 +8,6 @@ #include "rk3328-sdram-lpddr3-666.dtsi" &spi0 { - bootph-pre-ram; - bootph-some-ram; - flash@0 { bootph-pre-ram; bootph-some-ram; @@ -19,18 +16,22 @@ &spi0m2_clk { bootph-pre-ram; + bootph-some-ram; }; &spi0m2_cs0 { bootph-pre-ram; + bootph-some-ram; }; &spi0m2_rx { bootph-pre-ram; + bootph-some-ram; }; &spi0m2_tx { bootph-pre-ram; + bootph-some-ram; }; &usb20_otg { diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi index 1096821fc5d3..8ae003bbefd1 100644 --- a/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi +++ b/arch/arm/dts/rk3328-orangepi-r1-plus-u-boot.dtsi @@ -8,9 +8,6 @@ #include "rk3328-sdram-ddr4-666.dtsi" &spi0 { - bootph-pre-ram; - bootph-some-ram; - flash@0 { bootph-pre-ram; bootph-some-ram; @@ -19,18 +16,22 @@ &spi0m2_clk { bootph-pre-ram; + bootph-some-ram; }; &spi0m2_cs0 { bootph-pre-ram; + bootph-some-ram; }; &spi0m2_rx { bootph-pre-ram; + bootph-some-ram; }; &spi0m2_tx { bootph-pre-ram; + bootph-some-ram; }; &usb20_otg { diff --git a/arch/arm/dts/rk3328-rock64-u-boot.dtsi b/arch/arm/dts/rk3328-rock64-u-boot.dtsi index 551cff6f24f6..22f128090f84 100644 --- a/arch/arm/dts/rk3328-rock64-u-boot.dtsi +++ b/arch/arm/dts/rk3328-rock64-u-boot.dtsi @@ -30,9 +30,6 @@ }; &spi0 { - bootph-pre-ram; - bootph-some-ram; - flash@0 { bootph-pre-ram; bootph-some-ram; @@ -41,18 +38,22 @@ &spi0m2_clk { bootph-pre-ram; + bootph-some-ram; }; &spi0m2_cs0 { bootph-pre-ram; + bootph-some-ram; }; &spi0m2_rx { bootph-pre-ram; + bootph-some-ram; }; &spi0m2_tx { bootph-pre-ram; + bootph-some-ram; }; &usb20_otg { diff --git a/arch/arm/dts/rk3328-u-boot.dtsi b/arch/arm/dts/rk3328-u-boot.dtsi index d3608bd0e2b2..0135bc08d491 100644 --- a/arch/arm/dts/rk3328-u-boot.dtsi +++ b/arch/arm/dts/rk3328-u-boot.dtsi @@ -17,7 +17,6 @@ }; dmc: dmc { - bootph-all; compatible = "rockchip,rk3328-dmc"; reg = <0x0 0xff400000 0x0 0x1000 0x0 0xff780000 0x0 0x3000 @@ -25,6 +24,7 @@ 0x0 0xff440000 0x0 0x1000 0x0 0xff720000 0x0 0x1000 0x0 0xff798000 0x0 0x1000>; + bootph-all; }; }; @@ -42,14 +42,17 @@ &emmc_bus8 { bootph-pre-ram; + bootph-some-ram; }; &emmc_clk { bootph-pre-ram; + bootph-some-ram; }; &emmc_cmd { bootph-pre-ram; + bootph-some-ram; }; &gpio0 { @@ -66,10 +69,12 @@ &pcfg_pull_none_8ma { bootph-pre-ram; + bootph-some-ram; }; &pcfg_pull_none_12ma { bootph-pre-ram; + bootph-some-ram; }; &pcfg_pull_up { @@ -78,19 +83,21 @@ &pcfg_pull_up_4ma { bootph-pre-ram; + bootph-some-ram; }; &pcfg_pull_up_8ma { bootph-pre-ram; + bootph-some-ram; }; &pcfg_pull_up_12ma { bootph-pre-ram; + bootph-some-ram; }; &pinctrl { - bootph-pre-ram; - bootph-some-ram; + bootph-all; }; &sdmmc { @@ -103,18 +110,22 @@ &sdmmc0_bus4 { bootph-pre-ram; + bootph-some-ram; }; &sdmmc0_clk { bootph-pre-ram; + bootph-some-ram; }; &sdmmc0_cmd { bootph-pre-ram; + bootph-some-ram; }; &sdmmc0_dectn { bootph-pre-ram; + bootph-some-ram; }; &sdmmc0m1_pin { @@ -127,7 +138,8 @@ }; &uart2m1_xfer { - bootph-all; + bootph-pre-sram; + bootph-pre-ram; }; &vop {