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Sun, 28 Apr 2024 07:24:24 -0700 (PDT) Received: from heesub-ubuntu.localdomain ([58.229.217.38]) by smtp.gmail.com with ESMTPSA id t3-20020a635343000000b005f077dce0f6sm17568744pgl.31.2024.04.28.07.24.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 28 Apr 2024 07:24:23 -0700 (PDT) From: Heesub Shin To: u-boot@lists.denx.de Cc: Heesub Shin Subject: [PATCH 4/5] net: dwc_eth_qos: add support for phy-reset-gpios property Date: Sun, 28 Apr 2024 23:24:05 +0900 Message-Id: <20240428142406.28445-4-heesub@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20240428142406.28445-1-heesub@gmail.com> References: <20240428142406.28445-1-heesub@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Sun, 28 Apr 2024 16:40:40 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean This commit adds support for a property 'phy-reset-gpios' to reset PHY chipset. Signed-off-by: Heesub Shin --- drivers/net/dwc_eth_qos_stm32.c | 23 ++++++++++++++++++++++- 1 file changed, 22 insertions(+), 1 deletion(-) diff --git a/drivers/net/dwc_eth_qos_stm32.c b/drivers/net/dwc_eth_qos_stm32.c index fbc08bba1d..cffaa10b70 100644 --- a/drivers/net/dwc_eth_qos_stm32.c +++ b/drivers/net/dwc_eth_qos_stm32.c @@ -266,6 +266,12 @@ static int eqos_probe_resources_stm32(struct udevice *dev) if (ret) dev_warn(dev, "No phy clock provided %d\n", ret); + /* Get reset gpio pin (optional) */ + ret = gpio_request_by_name(dev, "phy-reset-gpios", 0, + &eqos->phy_reset_gpio, GPIOD_IS_OUT); + if (ret) + pr_warn("No phy reset gpio provided: %d\n", ret); + dev_dbg(dev, "%s: OK\n", __func__); return 0; @@ -277,6 +283,21 @@ err_probe: return ret; } +static int eqos_start_resets_stm32(struct udevice *dev) +{ + struct eqos_priv *eqos = dev_get_priv(dev); + + debug("%s(dev=%p):\n", __func__, dev); + + if (dm_gpio_is_valid(&eqos->phy_reset_gpio)) { + dm_gpio_set_value(&eqos->phy_reset_gpio, 1); + udelay(2); + dm_gpio_set_value(&eqos->phy_reset_gpio, 0); + } + + return 0; +} + static int eqos_remove_resources_stm32(struct udevice *dev) { dev_dbg(dev, "%s:\n", __func__); @@ -292,7 +313,7 @@ static struct eqos_ops eqos_stm32_ops = { .eqos_probe_resources = eqos_probe_resources_stm32, .eqos_remove_resources = eqos_remove_resources_stm32, .eqos_stop_resets = eqos_null_ops, - .eqos_start_resets = eqos_null_ops, + .eqos_start_resets = eqos_start_resets_stm32, .eqos_stop_clks = eqos_stop_clks_stm32, .eqos_start_clks = eqos_start_clks_stm32, .eqos_calibrate_pads = eqos_null_ops,