diff mbox series

[v2,01/23] clk: rockchip: rk356x: Add CLK_USB3OTGx_REF support

Message ID 20240413181425.1384357-2-jonas@kwiboo.se
State Superseded
Delegated to: Kever Yang
Headers show
Series rockchip: rk35xx: Miscellaneous fixes and updates | expand

Commit Message

Jonas Karlman April 13, 2024, 6:13 p.m. UTC 
The CLK_USB3OTGx_REF clocks is used as reference clock for USB3 block.

Add simple support to get rate of CLK_USB3OTGx_REF clocks to fix
reference clock period configuration.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
---
v2: No change
---
 drivers/clk/rockchip/clk_rk3568.c | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Sean Anderson April 19, 2024, 2:44 a.m. UTC | #1 
On 4/13/24 14:13, Jonas Karlman wrote:
> The CLK_USB3OTGx_REF clocks is used as reference clock for USB3 block.
> 
> Add simple support to get rate of CLK_USB3OTGx_REF clocks to fix
> reference clock period configuration.
> 
> Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
> ---
> v2: No change
> ---
>   drivers/clk/rockchip/clk_rk3568.c | 4 ++++
>   1 file changed, 4 insertions(+)
> 
> diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c
> index 57ef27dda893..999f48ea4b4e 100644
> --- a/drivers/clk/rockchip/clk_rk3568.c
> +++ b/drivers/clk/rockchip/clk_rk3568.c
> @@ -2417,6 +2417,8 @@ static ulong rk3568_clk_get_rate(struct clk *clk)
>   	case BCLK_EMMC:
>   		rate = rk3568_emmc_get_bclk(priv);
>   		break;
> +	case CLK_USB3OTG0_REF:
> +	case CLK_USB3OTG1_REF:
>   	case TCLK_EMMC:
>   		rate = OSC_HZ;
>   		break;
> @@ -2596,6 +2598,8 @@ static ulong rk3568_clk_set_rate(struct clk *clk, ulong rate)
>   	case BCLK_EMMC:
>   		ret = rk3568_emmc_set_bclk(priv, rate);
>   		break;
> +	case CLK_USB3OTG0_REF:
> +	case CLK_USB3OTG1_REF:
>   	case TCLK_EMMC:
>   		ret = OSC_HZ;
>   		break;

Acked-by: Sean Anderson <seanga2@gmail.com>
diff mbox series

Patch

diff --git a/drivers/clk/rockchip/clk_rk3568.c b/drivers/clk/rockchip/clk_rk3568.c
index 57ef27dda893..999f48ea4b4e 100644
--- a/drivers/clk/rockchip/clk_rk3568.c
+++ b/drivers/clk/rockchip/clk_rk3568.c
@@ -2417,6 +2417,8 @@  static ulong rk3568_clk_get_rate(struct clk *clk)
 	case BCLK_EMMC:
 		rate = rk3568_emmc_get_bclk(priv);
 		break;
+	case CLK_USB3OTG0_REF:
+	case CLK_USB3OTG1_REF:
 	case TCLK_EMMC:
 		rate = OSC_HZ;
 		break;
@@ -2596,6 +2598,8 @@  static ulong rk3568_clk_set_rate(struct clk *clk, ulong rate)
 	case BCLK_EMMC:
 		ret = rk3568_emmc_set_bclk(priv, rate);
 		break;
+	case CLK_USB3OTG0_REF:
+	case CLK_USB3OTG1_REF:
 	case TCLK_EMMC:
 		ret = OSC_HZ;
 		break;