diff mbox series

[PATCH-V2] arm:suniv:complete the serial port configuration of Suniv

Message ID 20240313054546.284435-1-lhdjply@126.com
State Rejected
Delegated to: Andre Przywara
Headers show
Series [PATCH-V2] arm:suniv:complete the serial port configuration of Suniv | expand

Commit Message

lhdjply@126.com March 13, 2024, 5:45 a.m. UTC 
From: lhdjply <lhdjply@126.com>

Due to the different serial ports used by each board, 
the serial IO configuration needs to be improved.

Signed-off-by: lhdjply <lhdjply@126.com>
---
 arch/arm/mach-sunxi/board.c | 4 ++--
 include/sunxi_gpio.h        | 6 ++++++
 2 files changed, 8 insertions(+), 2 deletions(-)
diff mbox series

Patch

diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c
index f4dbb2a740..b91c9629e4 100644
--- a/arch/arm/mach-sunxi/board.c
+++ b/arch/arm/mach-sunxi/board.c
@@ -151,8 +151,8 @@  static int gpio_init(void)
 	sunxi_gpio_set_cfgpin(SUNXI_GPE(3), 6);
 	sunxi_gpio_set_pull(SUNXI_GPE(3), SUNXI_GPIO_PULL_UP);
 #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUNIV)
-	sunxi_gpio_set_cfgpin(SUNXI_GPA(2), SUNIV_GPE_UART0);
-	sunxi_gpio_set_cfgpin(SUNXI_GPA(3), SUNIV_GPE_UART0);
+	sunxi_gpio_set_cfgpin(SUNXI_GPA(2), SUNIV_GPA_UART1);
+	sunxi_gpio_set_cfgpin(SUNXI_GPA(3), SUNIV_GPA_UART1);
 	sunxi_gpio_set_pull(SUNXI_GPA(3), SUNXI_GPIO_PULL_UP);
 #elif CONFIG_CONS_INDEX == 2 && defined(CONFIG_MACH_SUN5I)
 	sunxi_gpio_set_cfgpin(SUNXI_GPG(3), SUN5I_GPG_UART1);
diff --git a/include/sunxi_gpio.h b/include/sunxi_gpio.h
index db3742c039..51258e3dd9 100644
--- a/include/sunxi_gpio.h
+++ b/include/sunxi_gpio.h
@@ -108,6 +108,8 @@  enum sunxi_gpio_number {
 #define SUN8I_H3_GPA_UART0	2
 #define SUN8I_H3_GPA_UART2	2
 
+#define SUNIV_GPA_UART1		5
+
 #define SUN4I_GPB_PWM		2
 #define SUN4I_GPB_TWI0		2
 #define SUN4I_GPB_TWI1		2
@@ -130,12 +132,16 @@  enum sunxi_gpio_number {
 
 #define SUNXI_GPD_LCD0		2
 #define SUNXI_GPD_LVDS0		3
+#define SUNIV_GPD_UART1		3
+#define SUNIV_GPD_UART2		3
 
 #define SUNIV_GPE_UART0		5
+#define SUNIV_GPE_UART2		3
 
 #define SUNXI_GPF_SDC0		2
 #define SUNXI_GPF_UART0		4
 #define SUN8I_GPF_UART0		3
+#define SUNIV_GPF_UART0		3
 
 #define SUN4I_GPG_SDC1		4
 #define SUN5I_GPG_SDC1		2