| Message ID | 20240308201316.1721909-1-festevam@gmail.com |
|---|---|
| State | Accepted |
| Commit | bcbd1364cb0f32c3879a9c58ab8d61532e0bc4cd |
| Delegated to: | Sean Anderson |
| Headers | show |
| Series | [1/2] clk: clk-imx8qxp: Add LPUART IPG entries | expand |
> Subject: [PATCH 1/2] clk: clk-imx8qxp: Add LPUART IPG entries > > Since commit cc7df0b9e8bc ("serial: lpuart: Enable IPG clock") the colibri- > imx8qxp board no longer boots. > > The reason is that the imx8qxp clock driver does not handle the LPUART IPG > clocks inside get_rate(), set_rate() and enable() functions. > > Fix the boot regression by adding the LPUART IPG entries. > > Fixes: cc7df0b9e8bc ("serial: lpuart: Enable IPG clock") > Reported-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> > Signed-off-by: Fabio Estevam <festevam@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> > --- > drivers/clk/imx/clk-imx8qxp.c | 13 ++++++++++++- > 1 file changed, 12 insertions(+), 1 deletion(-) > > diff --git a/drivers/clk/imx/clk-imx8qxp.c b/drivers/clk/imx/clk-imx8qxp.c > index 8bf7e325481..d900d4cd528 100644 > --- a/drivers/clk/imx/clk-imx8qxp.c > +++ b/drivers/clk/imx/clk-imx8qxp.c > @@ -88,20 +88,23 @@ ulong imx8_clk_get_rate(struct clk *clk) > resource = SC_R_SDHC_1; > pm_clk = SC_PM_CLK_PER; > break; > - case IMX8QXP_UART0_IPG_CLK: > case IMX8QXP_UART0_CLK: > + case IMX8QXP_UART0_IPG_CLK: > resource = SC_R_UART_0; > pm_clk = SC_PM_CLK_PER; > break; > case IMX8QXP_UART1_CLK: > + case IMX8QXP_UART1_IPG_CLK: > resource = SC_R_UART_1; > pm_clk = SC_PM_CLK_PER; > break; > case IMX8QXP_UART2_CLK: > + case IMX8QXP_UART2_IPG_CLK: > resource = SC_R_UART_2; > pm_clk = SC_PM_CLK_PER; > break; > case IMX8QXP_UART3_CLK: > + case IMX8QXP_UART3_IPG_CLK: > resource = SC_R_UART_3; > pm_clk = SC_PM_CLK_PER; > break; > @@ -170,18 +173,22 @@ ulong imx8_clk_set_rate(struct clk *clk, unsigned > long rate) > pm_clk = SC_PM_CLK_PER; > break; > case IMX8QXP_UART0_CLK: > + case IMX8QXP_UART0_IPG_CLK: > resource = SC_R_UART_0; > pm_clk = SC_PM_CLK_PER; > break; > case IMX8QXP_UART1_CLK: > + case IMX8QXP_UART1_IPG_CLK: > resource = SC_R_UART_1; > pm_clk = SC_PM_CLK_PER; > break; > case IMX8QXP_UART2_CLK: > + case IMX8QXP_UART2_IPG_CLK: > resource = SC_R_UART_2; > pm_clk = SC_PM_CLK_PER; > break; > case IMX8QXP_UART3_CLK: > + case IMX8QXP_UART3_IPG_CLK: > resource = SC_R_UART_3; > pm_clk = SC_PM_CLK_PER; > break; > @@ -263,18 +270,22 @@ int __imx8_clk_enable(struct clk *clk, bool enable) > pm_clk = SC_PM_CLK_PER; > break; > case IMX8QXP_UART0_CLK: > + case IMX8QXP_UART0_IPG_CLK: > resource = SC_R_UART_0; > pm_clk = SC_PM_CLK_PER; > break; > case IMX8QXP_UART1_CLK: > + case IMX8QXP_UART1_IPG_CLK: > resource = SC_R_UART_1; > pm_clk = SC_PM_CLK_PER; > break; > case IMX8QXP_UART2_CLK: > + case IMX8QXP_UART2_IPG_CLK: > resource = SC_R_UART_2; > pm_clk = SC_PM_CLK_PER; > break; > case IMX8QXP_UART3_CLK: > + case IMX8QXP_UART3_IPG_CLK: > resource = SC_R_UART_3; > pm_clk = SC_PM_CLK_PER; > break; > -- > 2.34.1
On 09.03.2024 01:15, Peng Fan wrote: > > Subject: [PATCH 1/2] clk: clk-imx8qxp: Add LPUART IPG entries > > > > Since commit cc7df0b9e8bc ("serial: lpuart: Enable IPG clock") the colibri- > > imx8qxp board no longer boots. > > > > The reason is that the imx8qxp clock driver does not handle the LPUART IPG > > clocks inside get_rate(), set_rate() and enable() functions. > > > > Fix the boot regression by adding the LPUART IPG entries. > > > > Fixes: cc7df0b9e8bc ("serial: lpuart: Enable IPG clock") > > Reported-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> > > Signed-off-by: Fabio Estevam <festevam@gmail.com> > > Reviewed-by: Peng Fan <peng.fan@nxp.com> Tested-by: Hiago De Franco <hiago.franco@toradex.com> # Toradex Colibri iMX8X > > --- > > drivers/clk/imx/clk-imx8qxp.c | 13 ++++++++++++- > > 1 file changed, 12 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/clk/imx/clk-imx8qxp.c b/drivers/clk/imx/clk-imx8qxp.c > > index 8bf7e325481..d900d4cd528 100644 > > --- a/drivers/clk/imx/clk-imx8qxp.c > > +++ b/drivers/clk/imx/clk-imx8qxp.c > > @@ -88,20 +88,23 @@ ulong imx8_clk_get_rate(struct clk *clk) > > resource = SC_R_SDHC_1; > > pm_clk = SC_PM_CLK_PER; > > break; > > - case IMX8QXP_UART0_IPG_CLK: > > case IMX8QXP_UART0_CLK: > > + case IMX8QXP_UART0_IPG_CLK: > > resource = SC_R_UART_0; > > pm_clk = SC_PM_CLK_PER; > > break; > > case IMX8QXP_UART1_CLK: > > + case IMX8QXP_UART1_IPG_CLK: > > resource = SC_R_UART_1; > > pm_clk = SC_PM_CLK_PER; > > break; > > case IMX8QXP_UART2_CLK: > > + case IMX8QXP_UART2_IPG_CLK: > > resource = SC_R_UART_2; > > pm_clk = SC_PM_CLK_PER; > > break; > > case IMX8QXP_UART3_CLK: > > + case IMX8QXP_UART3_IPG_CLK: > > resource = SC_R_UART_3; > > pm_clk = SC_PM_CLK_PER; > > break; > > @@ -170,18 +173,22 @@ ulong imx8_clk_set_rate(struct clk *clk, unsigned > > long rate) > > pm_clk = SC_PM_CLK_PER; > > break; > > case IMX8QXP_UART0_CLK: > > + case IMX8QXP_UART0_IPG_CLK: > > resource = SC_R_UART_0; > > pm_clk = SC_PM_CLK_PER; > > break; > > case IMX8QXP_UART1_CLK: > > + case IMX8QXP_UART1_IPG_CLK: > > resource = SC_R_UART_1; > > pm_clk = SC_PM_CLK_PER; > > break; > > case IMX8QXP_UART2_CLK: > > + case IMX8QXP_UART2_IPG_CLK: > > resource = SC_R_UART_2; > > pm_clk = SC_PM_CLK_PER; > > break; > > case IMX8QXP_UART3_CLK: > > + case IMX8QXP_UART3_IPG_CLK: > > resource = SC_R_UART_3; > > pm_clk = SC_PM_CLK_PER; > > break; > > @@ -263,18 +270,22 @@ int __imx8_clk_enable(struct clk *clk, bool enable) > > pm_clk = SC_PM_CLK_PER; > > break; > > case IMX8QXP_UART0_CLK: > > + case IMX8QXP_UART0_IPG_CLK: > > resource = SC_R_UART_0; > > pm_clk = SC_PM_CLK_PER; > > break; > > case IMX8QXP_UART1_CLK: > > + case IMX8QXP_UART1_IPG_CLK: > > resource = SC_R_UART_1; > > pm_clk = SC_PM_CLK_PER; > > break; > > case IMX8QXP_UART2_CLK: > > + case IMX8QXP_UART2_IPG_CLK: > > resource = SC_R_UART_2; > > pm_clk = SC_PM_CLK_PER; > > break; > > case IMX8QXP_UART3_CLK: > > + case IMX8QXP_UART3_IPG_CLK: > > resource = SC_R_UART_3; > > pm_clk = SC_PM_CLK_PER; > > break; > > -- > > 2.34.1 >
Hi Tom and Sean, On Fri, Mar 8, 2024 at 5:13 PM Fabio Estevam <festevam@gmail.com> wrote: > > Since commit cc7df0b9e8bc ("serial: lpuart: Enable IPG clock") > the colibri-imx8qxp board no longer boots. > > The reason is that the imx8qxp clock driver does not handle the > LPUART IPG clocks inside get_rate(), set_rate() and enable() functions. > > Fix the boot regression by adding the LPUART IPG entries. > > Fixes: cc7df0b9e8bc ("serial: lpuart: Enable IPG clock") > Reported-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> > Signed-off-by: Fabio Estevam <festevam@gmail.com> Please consider applying this series to 2024.04. It fixes a boot regression on imx8qxp and imx8qm. Thanks!
On Mon, Mar 18, 2024 at 09:14:53PM -0300, Fabio Estevam wrote: > Hi Tom and Sean, > > On Fri, Mar 8, 2024 at 5:13 PM Fabio Estevam <festevam@gmail.com> wrote: > > > > Since commit cc7df0b9e8bc ("serial: lpuart: Enable IPG clock") > > the colibri-imx8qxp board no longer boots. > > > > The reason is that the imx8qxp clock driver does not handle the > > LPUART IPG clocks inside get_rate(), set_rate() and enable() functions. > > > > Fix the boot regression by adding the LPUART IPG entries. > > > > Fixes: cc7df0b9e8bc ("serial: lpuart: Enable IPG clock") > > Reported-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> > > Signed-off-by: Fabio Estevam <festevam@gmail.com> > > Please consider applying this series to 2024.04. > > It fixes a boot regression on imx8qxp and imx8qm. Fine with me, Sean?
On 3/19/24 15:04, Tom Rini wrote: > On Mon, Mar 18, 2024 at 09:14:53PM -0300, Fabio Estevam wrote: >> Hi Tom and Sean, >> >> On Fri, Mar 8, 2024 at 5:13 PM Fabio Estevam <festevam@gmail.com> wrote: >>> >>> Since commit cc7df0b9e8bc ("serial: lpuart: Enable IPG clock") >>> the colibri-imx8qxp board no longer boots. >>> >>> The reason is that the imx8qxp clock driver does not handle the >>> LPUART IPG clocks inside get_rate(), set_rate() and enable() functions. >>> >>> Fix the boot regression by adding the LPUART IPG entries. >>> >>> Fixes: cc7df0b9e8bc ("serial: lpuart: Enable IPG clock") >>> Reported-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> >>> Signed-off-by: Fabio Estevam <festevam@gmail.com> >> >> Please consider applying this series to 2024.04. >> >> It fixes a boot regression on imx8qxp and imx8qm. > > Fine with me, Sean? > Acked-by: Sean Anderson <seanga2@gmail.com> Can you pick this up directly, Tom? Thanks.
On Wed, Mar 20, 2024 at 10:41:51AM -0400, Sean Anderson wrote: > On 3/19/24 15:04, Tom Rini wrote: > > On Mon, Mar 18, 2024 at 09:14:53PM -0300, Fabio Estevam wrote: > > > Hi Tom and Sean, > > > > > > On Fri, Mar 8, 2024 at 5:13 PM Fabio Estevam <festevam@gmail.com> wrote: > > > > > > > > Since commit cc7df0b9e8bc ("serial: lpuart: Enable IPG clock") > > > > the colibri-imx8qxp board no longer boots. > > > > > > > > The reason is that the imx8qxp clock driver does not handle the > > > > LPUART IPG clocks inside get_rate(), set_rate() and enable() functions. > > > > > > > > Fix the boot regression by adding the LPUART IPG entries. > > > > > > > > Fixes: cc7df0b9e8bc ("serial: lpuart: Enable IPG clock") > > > > Reported-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> > > > > Signed-off-by: Fabio Estevam <festevam@gmail.com> > > > > > > Please consider applying this series to 2024.04. > > > > > > It fixes a boot regression on imx8qxp and imx8qm. > > > > Fine with me, Sean? > > > > Acked-by: Sean Anderson <seanga2@gmail.com> > > Can you pick this up directly, Tom? Thanks. In my dont-forget bundle now.
On Fri, 08 Mar 2024 17:13:15 -0300, Fabio Estevam wrote: > Since commit cc7df0b9e8bc ("serial: lpuart: Enable IPG clock") > the colibri-imx8qxp board no longer boots. > > The reason is that the imx8qxp clock driver does not handle the > LPUART IPG clocks inside get_rate(), set_rate() and enable() functions. > > Fix the boot regression by adding the LPUART IPG entries. > > [...] Applied to u-boot/master, thanks!
diff --git a/drivers/clk/imx/clk-imx8qxp.c b/drivers/clk/imx/clk-imx8qxp.c index 8bf7e325481..d900d4cd528 100644 --- a/drivers/clk/imx/clk-imx8qxp.c +++ b/drivers/clk/imx/clk-imx8qxp.c @@ -88,20 +88,23 @@ ulong imx8_clk_get_rate(struct clk *clk) resource = SC_R_SDHC_1; pm_clk = SC_PM_CLK_PER; break; - case IMX8QXP_UART0_IPG_CLK: case IMX8QXP_UART0_CLK: + case IMX8QXP_UART0_IPG_CLK: resource = SC_R_UART_0; pm_clk = SC_PM_CLK_PER; break; case IMX8QXP_UART1_CLK: + case IMX8QXP_UART1_IPG_CLK: resource = SC_R_UART_1; pm_clk = SC_PM_CLK_PER; break; case IMX8QXP_UART2_CLK: + case IMX8QXP_UART2_IPG_CLK: resource = SC_R_UART_2; pm_clk = SC_PM_CLK_PER; break; case IMX8QXP_UART3_CLK: + case IMX8QXP_UART3_IPG_CLK: resource = SC_R_UART_3; pm_clk = SC_PM_CLK_PER; break; @@ -170,18 +173,22 @@ ulong imx8_clk_set_rate(struct clk *clk, unsigned long rate) pm_clk = SC_PM_CLK_PER; break; case IMX8QXP_UART0_CLK: + case IMX8QXP_UART0_IPG_CLK: resource = SC_R_UART_0; pm_clk = SC_PM_CLK_PER; break; case IMX8QXP_UART1_CLK: + case IMX8QXP_UART1_IPG_CLK: resource = SC_R_UART_1; pm_clk = SC_PM_CLK_PER; break; case IMX8QXP_UART2_CLK: + case IMX8QXP_UART2_IPG_CLK: resource = SC_R_UART_2; pm_clk = SC_PM_CLK_PER; break; case IMX8QXP_UART3_CLK: + case IMX8QXP_UART3_IPG_CLK: resource = SC_R_UART_3; pm_clk = SC_PM_CLK_PER; break; @@ -263,18 +270,22 @@ int __imx8_clk_enable(struct clk *clk, bool enable) pm_clk = SC_PM_CLK_PER; break; case IMX8QXP_UART0_CLK: + case IMX8QXP_UART0_IPG_CLK: resource = SC_R_UART_0; pm_clk = SC_PM_CLK_PER; break; case IMX8QXP_UART1_CLK: + case IMX8QXP_UART1_IPG_CLK: resource = SC_R_UART_1; pm_clk = SC_PM_CLK_PER; break; case IMX8QXP_UART2_CLK: + case IMX8QXP_UART2_IPG_CLK: resource = SC_R_UART_2; pm_clk = SC_PM_CLK_PER; break; case IMX8QXP_UART3_CLK: + case IMX8QXP_UART3_IPG_CLK: resource = SC_R_UART_3; pm_clk = SC_PM_CLK_PER; break;
Since commit cc7df0b9e8bc ("serial: lpuart: Enable IPG clock") the colibri-imx8qxp board no longer boots. The reason is that the imx8qxp clock driver does not handle the LPUART IPG clocks inside get_rate(), set_rate() and enable() functions. Fix the boot regression by adding the LPUART IPG entries. Fixes: cc7df0b9e8bc ("serial: lpuart: Enable IPG clock") Reported-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Fabio Estevam <festevam@gmail.com> --- drivers/clk/imx/clk-imx8qxp.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-)