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Sun, 21 Jan 2024 07:06:59 -0800 (PST) Received: from localhost.localdomain ([218.73.27.11]) by smtp.gmail.com with ESMTPSA id ke5-20020a170903340500b001d33e6521b9sm5942139plb.14.2024.01.21.07.06.55 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 21 Jan 2024 07:06:58 -0800 (PST) From: Kongyang Liu To: u-boot@lists.denx.de Cc: Adam Ford , Chris Morgan , Fabio Estevam , Heinrich Schuchardt , Kever Yang , Nishanth Menon , Ralph Siemsen , Svyatoslav Ryhel , Thierry Reding , Tim Harvey , Tom Rini , Wei Fu , Yanhong Wang , Yannic Moog , Yixun Lan Subject: [PATCH v3 3/3] doc: sophgo: milkv_duo: document Milk-V Duo board Date: Sun, 21 Jan 2024 23:05:15 +0800 Message-ID: <20240121150630.30588-4-seashell11234455@gmail.com> X-Mailer: git-send-email 2.41.0 In-Reply-To: <20240121150630.30588-1-seashell11234455@gmail.com> References: <20240121150630.30588-1-seashell11234455@gmail.com> MIME-Version: 1.0 X-Mailman-Approved-At: Sun, 21 Jan 2024 16:11:19 +0100 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Add document for Milk-V Duo board which based on Sophgo's CV1800B SoC. Signed-off-by: Kongyang Liu --- Changes in v3: - Add brief description of the procedure to run u-boot-dtb.bin doc/board/index.rst | 1 + doc/board/sophgo/index.rst | 8 +++++ doc/board/sophgo/milkv_duo.rst | 64 ++++++++++++++++++++++++++++++++++ 3 files changed, 73 insertions(+) create mode 100644 doc/board/sophgo/index.rst create mode 100644 doc/board/sophgo/milkv_duo.rst diff --git a/doc/board/index.rst b/doc/board/index.rst index c96e5fda28..d0f9f355d2 100644 --- a/doc/board/index.rst +++ b/doc/board/index.rst @@ -46,6 +46,7 @@ Board-specific doc sifive/index sipeed/index socionext/index + sophgo/index st/index starfive/index ste/index diff --git a/doc/board/sophgo/index.rst b/doc/board/sophgo/index.rst new file mode 100644 index 0000000000..e097afdac6 --- /dev/null +++ b/doc/board/sophgo/index.rst @@ -0,0 +1,8 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Sophgo +====== +.. toctree:: + :maxdepth: 1 + + milkv_duo diff --git a/doc/board/sophgo/milkv_duo.rst b/doc/board/sophgo/milkv_duo.rst new file mode 100644 index 0000000000..cb2ed1ad98 --- /dev/null +++ b/doc/board/sophgo/milkv_duo.rst @@ -0,0 +1,64 @@ +.. SPDX-License-Identifier: GPL-2.0+ + +Milk-V Duo +========== + +CV1800B RISC-V SoC +------------------ +The CV1800B is a high-performance, low-power 1+1 64-bit RISC-V SoC from Sophgo. + +Mainline support +---------------- +The support for following drivers are already enabled: +1. ns16550 UART Driver. + +Building +~~~~~~~~ +1. Add the RISC-V toolchain to your PATH. +2. Setup ARCH & cross compilation environment variable: + +.. code-block:: console + + export CROSS_COMPILE= + cd + make milkv_duo_defconfig + make + +This will generate u-boot-dtb.bin + +Booting +~~~~~~~ +Currently, we rely on vendor FSBL(First Stage Boot Loader) to initialize the +clock and load the u-boot image, then bootup from it. + +Alternatively, to run u-boot-dtb.bin on top of FSBL, follow these steps: + +1. Use the vendor-provided tool to create a unified fip.bin file containing + FSBL, OpenSBI, and U-Boot. + +2. Place the generated fip.bin file into the FAT partition of the SD card. + +3. Insert the SD card into the board and power it on. + +The board will automatically execute the FSBL from the fip.bin file. +Subsequently, it will transition to OpenSBI, and finally, OpenSBI will invoke +U-Boot. + + +Sample boot log from Milk-V Duo board +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +.. code-block:: none + + U-Boot 2024.01-rc5-00010-g51965baa36 (Dec 28 2023 - 13:15:53 +0800)milkv_duo + + DRAM: 63.3 MiB + Core: 10 devices, 8 uclasses, devicetree: separate + Loading Environment from nowhere... OK + In: serial@4140000 + Out: serial@4140000 + Err: serial@4140000 + Net: No ethernet found. + milkv_duo# cpu detail + 0: cpu@0 rv64imafdc + ID = 0, freq = 0 Hz: L1 cache, MMU + milkv_duo#