From patchwork Mon Dec 11 02:22:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jun Liang Tan X-Patchwork-Id: 1874508 X-Patchwork-Delegate: uboot@andestech.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org) Received: from phobos.denx.de (phobos.denx.de [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (secp384r1) server-digest SHA384) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4SpjjZ444Kz20Gs for ; Tue, 12 Dec 2023 00:47:30 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id A292087682; Mon, 11 Dec 2023 14:47:27 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=starfivetech.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 7BE1487716; Mon, 11 Dec 2023 03:23:11 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-1.1 required=5.0 tests=BAYES_00, FSL_HELO_NON_FQDN_1, HELO_NO_DOMAIN,RDNS_NONE,T_SCC_BODY_TEXT_LINE,T_SPF_PERMERROR autolearn=no autolearn_force=no version=3.4.2 Received: from mdcsw (unknown [202.188.176.82]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id D9C69876F2 for ; Mon, 11 Dec 2023 03:23:07 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=none (p=none dis=none) header.from=starfivetech.com Authentication-Results: phobos.denx.de; spf=fail smtp.mailfrom="junliang.tan@sw_buildbot"@starfivetech.com Received: by mdcsw (Postfix, from userid 5274) id AC0CD2C841ED; Mon, 11 Dec 2023 10:23:04 +0800 (CST) From: Jun Liang Tan To: U-Boot@lists.denx.de Cc: cheehong.ang@starfivetech.com, junliang.tan@starfivetech.com, Kuan Lim Lee , Wei Liang Lim Subject: [PATCH v2] timer: starfive: Add Starfive timer support Date: Mon, 11 Dec 2023 10:22:10 +0800 Message-Id: <20231211022210.3880678-1-junliang.tan@starfivetech.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Mailman-Approved-At: Mon, 11 Dec 2023 14:47:26 +0100 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Kuan Lim Lee Add timer driver in Starfive SoC. It is an timer that outside of CPU core and inside Starfive SoC. Signed-off-by: Kuan Lim Lee Signed-off-by: Wei Liang Lim Changes for v2: - correct driver name, comment, variable Reviewed-by: Leo Yu-Chi Liang --- drivers/timer/starfive-timer.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) diff --git a/drivers/timer/starfive-timer.c b/drivers/timer/starfive-timer.c index 816402fdbf..6ac7d7f1d0 100644 --- a/drivers/timer/starfive-timer.c +++ b/drivers/timer/starfive-timer.c @@ -1,7 +1,7 @@ // SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2022 StarFive, Inc. All rights reserved. - * Author: Lee Kuan Lim + * Author: Kuan Lim Lee */ #include @@ -48,8 +48,8 @@ static int starfive_probe(struct udevice *dev) int ret; priv->base = dev_read_addr_ptr(dev); - if (IS_ERR(priv->base)) - return PTR_ERR(priv->base); + if (!priv->base) + return -EINVAL; timer_channel = dev_read_u32_default(dev, "channel", 0); priv->base = priv->base + (0x40 * timer_channel); @@ -64,14 +64,16 @@ static int starfive_probe(struct udevice *dev) return ret; uc_priv->clock_rate = clk_get_rate(&clk); - /* Initiate timer, channel 0 */ - /* Unmask Interrupt Mask */ + /* + * Initiate timer, channel 0 + * Unmask Interrupt Mask + */ writel(0, priv->base + STF_TIMER_INT_MASK); /* Single run mode Setting */ if (dev_read_bool(dev, "single-run")) writel(1, priv->base + STF_TIMER_CTL); /* Set Reload value */ - priv->timer_size = dev_read_u32_default(dev, "timer-size", 0xffffffff); + priv->timer_size = dev_read_u32_default(dev, "timer-size", -1U); writel(priv->timer_size, priv->base + STF_TIMER_LOAD); /* Enable to start timer */ writel(1, priv->base + STF_TIMER_ENABLE); @@ -85,7 +87,7 @@ static const struct udevice_id starfive_ids[] = { }; U_BOOT_DRIVER(jh8100_starfive_timer) = { - .name = "jh8100_starfive_timer", + .name = "starfive_timer", .id = UCLASS_TIMER, .of_match = starfive_ids, .probe = starfive_probe,