Message ID | 20231018191742.1303779-1-festevam@gmail.com |
---|---|
State | Accepted |
Commit | 6e6492c85defa51d7d8def8580d0d49610ebf0fa |
Delegated to: | Stefano Babic |
Headers | show |
Series | [1/2] imx8mp_evk: Convert to DM_PMIC | expand |
On 10/19/2023 3:17 AM, Fabio Estevam wrote: > From: Fabio Estevam <festevam@denx.de> > > Currently, the imx8mp_evk uses the non-DM code to initialize the PMIC. > > Convert to DM_PMIC, which is the recommended way to access the PMIC. > > While at it, fix multi-line comments style. > > Signed-off-by: Fabio Estevam <festevam@denx.de> Reviewed-by: Peng Fan <peng.fan@nxp.com> > --- > arch/arm/dts/imx8mp-evk-u-boot.dtsi | 18 ++++++++++- > board/freescale/imx8mp_evk/spl.c | 50 +++++++++++++++-------------- > configs/imx8mp_evk_defconfig | 12 +++---- > 3 files changed, 47 insertions(+), 33 deletions(-) > > diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk-u-boot.dtsi > index 9ed62f1bb02d..0bf489b46248 100644 > --- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi > +++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi > @@ -13,6 +13,22 @@ > }; > }; > > +&pinctrl_i2c1 { > + bootph-all; > +}; > + > +&pinctrl_pmic { > + bootph-all; > +}; > + > +&{/soc@0/bus@30800000/i2c@30a20000/pmic@25} { > + bootph-all; > +}; > + > +&{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} { > + bootph-all; > +}; > + > ®_usdhc2_vmmc { > u-boot,off-on-delay-us = <20000>; > }; > @@ -66,7 +82,7 @@ > }; > > &i2c1 { > - bootph-pre-ram; > + bootph-all; > }; > > &i2c2 { > diff --git a/board/freescale/imx8mp_evk/spl.c b/board/freescale/imx8mp_evk/spl.c > index 246826a0d482..9dd2cbc799c3 100644 > --- a/board/freescale/imx8mp_evk/spl.c > +++ b/board/freescale/imx8mp_evk/spl.c > @@ -67,40 +67,44 @@ struct i2c_pads_info i2c_pad_info1 = { > }, > }; > > -#if CONFIG_IS_ENABLED(POWER_LEGACY) > -#define I2C_PMIC 0 > +#if CONFIG_IS_ENABLED(DM_PMIC_PCA9450) > int power_init_board(void) > { > - struct pmic *p; > + struct udevice *dev; > int ret; > > - ret = power_pca9450_init(I2C_PMIC, 0x25); > - if (ret) > - printf("power init failed"); > - p = pmic_get("PCA9450"); > - pmic_probe(p); > + ret = pmic_get("pmic@25", &dev); > + if (ret == -ENODEV) { > + puts("No pmic@25\n"); > + return 0; > + } > + if (ret < 0) > + return ret; > > /* BUCKxOUT_DVS0/1 control BUCK123 output */ > - pmic_reg_write(p, PCA9450_BUCK123_DVS, 0x29); > + pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29); > > /* > - * increase VDD_SOC to typical value 0.95V before first > - * DRAM access, set DVS1 to 0.85v for suspend. > + * Increase VDD_SOC to typical value 0.95V before first > + * DRAM access, set DVS1 to 0.85V for suspend. > * Enable DVS control through PMIC_STBY_REQ and > * set B1_ENMODE=1 (ON by PMIC_ON_REQ=H) > */ > -#ifdef CONFIG_IMX8M_VDD_SOC_850MV > - /* set DVS0 to 0.85v for special case*/ > - pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x14); > -#else > - pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x1C); > -#endif > - pmic_reg_write(p, PCA9450_BUCK1OUT_DVS1, 0x14); > - pmic_reg_write(p, PCA9450_BUCK1CTRL, 0x59); > + if (CONFIG_IS_ENABLED(IMX8M_VDD_SOC_850MV)) > + pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x14); > + else > + pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x1C); > > - /* Kernel uses OD/OD freq for SOC */ > - /* To avoid timing risk from SOC to ARM,increase VDD_ARM to OD voltage 0.95v */ > - pmic_reg_write(p, PCA9450_BUCK2OUT_DVS0, 0x1C); > + pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x14); > + pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59); > + > + /* > + * Kernel uses OD/OD freq for SOC. > + * To avoid timing risk from SOC to ARM,increase VDD_ARM to OD > + * voltage 0.95V. > + */ > + > + pmic_reg_write(dev, PCA9450_BUCK2OUT_DVS0, 0x1C); > > return 0; > } > @@ -135,8 +139,6 @@ void board_init_f(ulong dummy) > > enable_tzc380(); > > - setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); > - > power_init_board(); > > /* DDR initialization */ > diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig > index 820dc36e9cdd..0675f0f4f41b 100644 > --- a/configs/imx8mp_evk_defconfig > +++ b/configs/imx8mp_evk_defconfig > @@ -7,9 +7,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y > CONFIG_SPL_LIBGENERIC_SUPPORT=y > CONFIG_ENV_SIZE=0x1000 > CONFIG_ENV_OFFSET=0x400000 > -CONFIG_SYS_I2C_MXC_I2C1=y > -CONFIG_SYS_I2C_MXC_I2C2=y > -CONFIG_SYS_I2C_MXC_I2C3=y > CONFIG_DM_GPIO=y > CONFIG_DEFAULT_DEVICE_TREE="imx8mp-evk" > CONFIG_SPL_TEXT_BASE=0x920000 > @@ -88,8 +85,6 @@ CONFIG_FASTBOOT_MMC_USER_SUPPORT=y > CONFIG_MXC_GPIO=y > CONFIG_DM_PCA953X=y > CONFIG_DM_I2C=y > -# CONFIG_SPL_DM_I2C is not set > -CONFIG_SPL_SYS_I2C_LEGACY=y > CONFIG_LED=y > CONFIG_LED_GPIO=y > CONFIG_SUPPORT_EMMC_BOOT=y > @@ -110,15 +105,16 @@ CONFIG_PHY_IMX8MQ_USB=y > CONFIG_PINCTRL=y > CONFIG_SPL_PINCTRL=y > CONFIG_PINCTRL_IMX8M=y > -CONFIG_SPL_POWER_LEGACY=y > CONFIG_POWER_DOMAIN=y > CONFIG_IMX8M_POWER_DOMAIN=y > CONFIG_IMX8MP_HSIOMIX_BLKCTRL=y > -CONFIG_POWER_PCA9450=y > +CONFIG_DM_PMIC=y > +CONFIG_DM_PMIC_PCA9450=y > +CONFIG_SPL_DM_PMIC_PCA9450=y > CONFIG_DM_REGULATOR=y > +CONFIG_DM_REGULATOR_PCA9450=y > CONFIG_DM_REGULATOR_FIXED=y > CONFIG_DM_REGULATOR_GPIO=y > -CONFIG_SPL_POWER_I2C=y > CONFIG_DM_SERIAL=y > CONFIG_MXC_UART=y > CONFIG_SYSRESET=y
On Wed, Oct 18, 2023 at 4:17 PM Fabio Estevam <festevam@gmail.com> wrote: > > From: Fabio Estevam <festevam@denx.de> > > Currently, the imx8mp_evk uses the non-DM code to initialize the PMIC. > > Convert to DM_PMIC, which is the recommended way to access the PMIC. > > While at it, fix multi-line comments style. > > Signed-off-by: Fabio Estevam <festevam@denx.de> Applied to u-boot-imx next, thanks.
diff --git a/arch/arm/dts/imx8mp-evk-u-boot.dtsi b/arch/arm/dts/imx8mp-evk-u-boot.dtsi index 9ed62f1bb02d..0bf489b46248 100644 --- a/arch/arm/dts/imx8mp-evk-u-boot.dtsi +++ b/arch/arm/dts/imx8mp-evk-u-boot.dtsi @@ -13,6 +13,22 @@ }; }; +&pinctrl_i2c1 { + bootph-all; +}; + +&pinctrl_pmic { + bootph-all; +}; + +&{/soc@0/bus@30800000/i2c@30a20000/pmic@25} { + bootph-all; +}; + +&{/soc@0/bus@30800000/i2c@30a20000/pmic@25/regulators} { + bootph-all; +}; + ®_usdhc2_vmmc { u-boot,off-on-delay-us = <20000>; }; @@ -66,7 +82,7 @@ }; &i2c1 { - bootph-pre-ram; + bootph-all; }; &i2c2 { diff --git a/board/freescale/imx8mp_evk/spl.c b/board/freescale/imx8mp_evk/spl.c index 246826a0d482..9dd2cbc799c3 100644 --- a/board/freescale/imx8mp_evk/spl.c +++ b/board/freescale/imx8mp_evk/spl.c @@ -67,40 +67,44 @@ struct i2c_pads_info i2c_pad_info1 = { }, }; -#if CONFIG_IS_ENABLED(POWER_LEGACY) -#define I2C_PMIC 0 +#if CONFIG_IS_ENABLED(DM_PMIC_PCA9450) int power_init_board(void) { - struct pmic *p; + struct udevice *dev; int ret; - ret = power_pca9450_init(I2C_PMIC, 0x25); - if (ret) - printf("power init failed"); - p = pmic_get("PCA9450"); - pmic_probe(p); + ret = pmic_get("pmic@25", &dev); + if (ret == -ENODEV) { + puts("No pmic@25\n"); + return 0; + } + if (ret < 0) + return ret; /* BUCKxOUT_DVS0/1 control BUCK123 output */ - pmic_reg_write(p, PCA9450_BUCK123_DVS, 0x29); + pmic_reg_write(dev, PCA9450_BUCK123_DVS, 0x29); /* - * increase VDD_SOC to typical value 0.95V before first - * DRAM access, set DVS1 to 0.85v for suspend. + * Increase VDD_SOC to typical value 0.95V before first + * DRAM access, set DVS1 to 0.85V for suspend. * Enable DVS control through PMIC_STBY_REQ and * set B1_ENMODE=1 (ON by PMIC_ON_REQ=H) */ -#ifdef CONFIG_IMX8M_VDD_SOC_850MV - /* set DVS0 to 0.85v for special case*/ - pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x14); -#else - pmic_reg_write(p, PCA9450_BUCK1OUT_DVS0, 0x1C); -#endif - pmic_reg_write(p, PCA9450_BUCK1OUT_DVS1, 0x14); - pmic_reg_write(p, PCA9450_BUCK1CTRL, 0x59); + if (CONFIG_IS_ENABLED(IMX8M_VDD_SOC_850MV)) + pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x14); + else + pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS0, 0x1C); - /* Kernel uses OD/OD freq for SOC */ - /* To avoid timing risk from SOC to ARM,increase VDD_ARM to OD voltage 0.95v */ - pmic_reg_write(p, PCA9450_BUCK2OUT_DVS0, 0x1C); + pmic_reg_write(dev, PCA9450_BUCK1OUT_DVS1, 0x14); + pmic_reg_write(dev, PCA9450_BUCK1CTRL, 0x59); + + /* + * Kernel uses OD/OD freq for SOC. + * To avoid timing risk from SOC to ARM,increase VDD_ARM to OD + * voltage 0.95V. + */ + + pmic_reg_write(dev, PCA9450_BUCK2OUT_DVS0, 0x1C); return 0; } @@ -135,8 +139,6 @@ void board_init_f(ulong dummy) enable_tzc380(); - setup_i2c(0, CONFIG_SYS_I2C_SPEED, 0x7f, &i2c_pad_info1); - power_init_board(); /* DDR initialization */ diff --git a/configs/imx8mp_evk_defconfig b/configs/imx8mp_evk_defconfig index 820dc36e9cdd..0675f0f4f41b 100644 --- a/configs/imx8mp_evk_defconfig +++ b/configs/imx8mp_evk_defconfig @@ -7,9 +7,6 @@ CONFIG_SPL_LIBCOMMON_SUPPORT=y CONFIG_SPL_LIBGENERIC_SUPPORT=y CONFIG_ENV_SIZE=0x1000 CONFIG_ENV_OFFSET=0x400000 -CONFIG_SYS_I2C_MXC_I2C1=y -CONFIG_SYS_I2C_MXC_I2C2=y -CONFIG_SYS_I2C_MXC_I2C3=y CONFIG_DM_GPIO=y CONFIG_DEFAULT_DEVICE_TREE="imx8mp-evk" CONFIG_SPL_TEXT_BASE=0x920000 @@ -88,8 +85,6 @@ CONFIG_FASTBOOT_MMC_USER_SUPPORT=y CONFIG_MXC_GPIO=y CONFIG_DM_PCA953X=y CONFIG_DM_I2C=y -# CONFIG_SPL_DM_I2C is not set -CONFIG_SPL_SYS_I2C_LEGACY=y CONFIG_LED=y CONFIG_LED_GPIO=y CONFIG_SUPPORT_EMMC_BOOT=y @@ -110,15 +105,16 @@ CONFIG_PHY_IMX8MQ_USB=y CONFIG_PINCTRL=y CONFIG_SPL_PINCTRL=y CONFIG_PINCTRL_IMX8M=y -CONFIG_SPL_POWER_LEGACY=y CONFIG_POWER_DOMAIN=y CONFIG_IMX8M_POWER_DOMAIN=y CONFIG_IMX8MP_HSIOMIX_BLKCTRL=y -CONFIG_POWER_PCA9450=y +CONFIG_DM_PMIC=y +CONFIG_DM_PMIC_PCA9450=y +CONFIG_SPL_DM_PMIC_PCA9450=y CONFIG_DM_REGULATOR=y +CONFIG_DM_REGULATOR_PCA9450=y CONFIG_DM_REGULATOR_FIXED=y CONFIG_DM_REGULATOR_GPIO=y -CONFIG_SPL_POWER_I2C=y CONFIG_DM_SERIAL=y CONFIG_MXC_UART=y CONFIG_SYSRESET=y