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([178.233.24.1]) by smtp.gmail.com with ESMTPSA id r11-20020a5d4e4b000000b00317b063590fsm12600049wrt.55.2023.08.21.06.51.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 21 Aug 2023 06:51:51 -0700 (PDT) From: Alper Nebi Yasak To: u-boot@lists.denx.de Cc: Kever Yang , Jagan Teki , Andre Przywara , Svyatoslav Ryhel , Alexander Graf , Philipp Tomsich , Andrew Davis , Da Xue , Heinrich Schuchardt , Patrice Chotard , Patrick Delaunay , Derald Woods , Anatolij Gustschin , uboot-stm32@st-md-mailman.stormreply.com, Simon Glass , Matthias Brugger , u-boot-amlogic@groups.io, Ilias Apalodimas , Neil Armstrong , Alper Nebi Yasak Subject: [PATCH v5 12/13] video: Always compile cache flushing code Date: Mon, 21 Aug 2023 16:51:09 +0300 Message-Id: <20230821135111.3558478-13-alpernebiyasak@gmail.com> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230821135111.3558478-1-alpernebiyasak@gmail.com> References: <20230821135111.3558478-1-alpernebiyasak@gmail.com> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Alexander Graf The dcache flushing code path was conditional on ARM && !DCACHE config options. However, dcaches exist on other platforms as well and may need clearing if their driver requires it. Simplify the compile logic and always enable the dcache flush logic in the video core. That way, drivers can always rely on it to call the arch specific callbacks. This will increase code size for non-ARM platforms with CONFIG_VIDEO=y slightly. Reported-by: Heinrich Schuchardt Signed-off-by: Alexander Graf Reviewed-by: Simon Glass Signed-off-by: Alper Nebi Yasak --- (no changes since v4) Changes in v4: - Add patch "video: Always compile cache flushing code" drivers/video/video-uclass.c | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-) diff --git a/drivers/video/video-uclass.c b/drivers/video/video-uclass.c index c79499252a22..3f9ddaadd15d 100644 --- a/drivers/video/video-uclass.c +++ b/drivers/video/video-uclass.c @@ -377,11 +377,13 @@ void video_damage(struct udevice *vid, int x, int y, int width, int height) priv->damage.yend = max(yend, priv->damage.yend); } -#if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) static void video_flush_dcache(struct udevice *vid) { struct video_priv *priv = dev_get_uclass_priv(vid); + if (CONFIG_IS_ENABLED(SYS_DCACHE_OFF)) + return; + if (!priv->flush_dcache) return; @@ -410,7 +412,6 @@ static void video_flush_dcache(struct udevice *vid) } } } -#endif static void video_flush_copy(struct udevice *vid) { @@ -449,14 +450,9 @@ int video_sync(struct udevice *vid, bool force) return ret; } - /* - * flush_dcache_range() is declared in common.h but it seems that some - * architectures do not actually implement it. Is there a way to find - * out whether it exists? For now, ARM is safe. - */ -#if defined(CONFIG_ARM) && !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) video_flush_dcache(vid); -#elif defined(CONFIG_VIDEO_SANDBOX_SDL) + +#if defined(CONFIG_VIDEO_SANDBOX_SDL) static ulong last_sync; if (force || get_timer(last_sync) > 100) {