| Message ID | 20230807171453.134084-1-linux@fw-web.de |
|---|---|
| State | Superseded |
| Delegated to: | Kever Yang |
| Headers | show |
| Series | [v1] board: rockchip: Add Bananapi R2Pro Board | expand |
Could you stop sending me these rockchip emails? What is not understandable on the fact that I'm not rockchip maintainer? https://lists.denx.de/pipermail/u-boot/2023-March/511199.html https://lists.denx.de/pipermail/u-boot/2023-April/515012.html On Monday 07 August 2023 19:14:53 Frank Wunderlich wrote: > From: Frank Wunderlich <frank-w@public-files.de> > > Add rk3568 based Bananapi R2 Pro board. > > Signed-off-by: Frank Wunderlich <frank-w@public-files.de> > --- > because iodomain is different to evb and now iodomain driver is sent as > patch we need to separate between EVB and R2Pro else board can be bricked. > --- > arch/arm/dts/Makefile | 3 +- > arch/arm/dts/rk3568-bpi-r2pro-u-boot.dtsi | 23 + > arch/arm/dts/rk3568-bpi-r2pro.dts | 597 ++++++++++++++++++++++ > configs/bpi-r2pro-rk3568_defconfig | 101 ++++ > 4 files changed, 723 insertions(+), 1 deletion(-) > create mode 100644 arch/arm/dts/rk3568-bpi-r2pro-u-boot.dtsi > create mode 100644 arch/arm/dts/rk3568-bpi-r2pro.dts > create mode 100644 configs/bpi-r2pro-rk3568_defconfig > > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile > index 8f43dba58632..1bd48a7e0535 100644 > --- a/arch/arm/dts/Makefile > +++ b/arch/arm/dts/Makefile > @@ -182,7 +182,8 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \ > rk3568-nanopi-r5s.dtb \ > rk3568-odroid-m1.dtb \ > rk3568-radxa-e25.dtb \ > - rk3568-rock-3a.dtb > + rk3568-rock-3a.dtb \ > + rk3568-bpi-r2pro.dtb > > dtb-$(CONFIG_ROCKCHIP_RK3588) += \ > rk3588-edgeble-neu6a-io.dtb \ > diff --git a/arch/arm/dts/rk3568-bpi-r2pro-u-boot.dtsi b/arch/arm/dts/rk3568-bpi-r2pro-u-boot.dtsi > new file mode 100644 > index 000000000000..382a52a28b10 > --- /dev/null > +++ b/arch/arm/dts/rk3568-bpi-r2pro-u-boot.dtsi > @@ -0,0 +1,23 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * (C) Copyright 2021 Rockchip Electronics Co., Ltd > + */ > + > +#include "rk356x-u-boot.dtsi" > + > +/ { > + chosen { > + stdout-path = &uart2; > + u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci; > + }; > +}; > + > +&sdmmc0 { > + status = "okay"; > +}; > + > +&uart2 { > + clock-frequency = <24000000>; > + bootph-pre-ram; > + status = "okay"; > +}; > diff --git a/arch/arm/dts/rk3568-bpi-r2pro.dts b/arch/arm/dts/rk3568-bpi-r2pro.dts > new file mode 100644 > index 000000000000..9295e9836a56 > --- /dev/null > +++ b/arch/arm/dts/rk3568-bpi-r2pro.dts > @@ -0,0 +1,597 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Author: Frank Wunderlich <frank-w@public-files.de> > + * > + */ > + > +/dts-v1/; > +#include <dt-bindings/gpio/gpio.h> > +#include <dt-bindings/leds/common.h> > +#include <dt-bindings/pinctrl/rockchip.h> > +#include "rk3568.dtsi" > + > +/ { > + model = "Bananapi-R2 Pro (RK3568) DDR4 Board"; > + compatible = "rockchip,rk3568-bpi-r2pro", "rockchip,rk3568"; > + > + aliases { > + ethernet0 = &gmac0; > + ethernet1 = &gmac1; > + mmc0 = &sdmmc0; > + mmc1 = &sdhci; > + }; > + > + chosen: chosen { > + stdout-path = "serial2:1500000n8"; > + }; > + > + leds { > + compatible = "gpio-leds"; > + pinctrl-names = "default"; > + pinctrl-0 = <&blue_led_pin &green_led_pin>; > + > + blue_led: led-0 { > + color = <LED_COLOR_ID_BLUE>; > + default-state = "off"; > + function = LED_FUNCTION_STATUS; > + gpios = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>; > + }; > + > + green_led: led-1 { > + color = <LED_COLOR_ID_GREEN>; > + default-state = "on"; > + function = LED_FUNCTION_POWER; > + gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; > + }; > + }; > + > + dc_12v: dc-12v-regulator { > + compatible = "regulator-fixed"; > + regulator-name = "dc_12v"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <12000000>; > + regulator-max-microvolt = <12000000>; > + }; > + > + vcc3v3_sys: vcc3v3-sys-regulator { > + compatible = "regulator-fixed"; > + regulator-name = "vcc3v3_sys"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + vin-supply = <&dc_12v>; > + }; > + > + vcc5v0_sys: vcc5v0-sys-regulator { > + compatible = "regulator-fixed"; > + regulator-name = "vcc5v0_sys"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + vin-supply = <&dc_12v>; > + }; > + > + vcc5v0_usb: vcc5v0-usb-regulator { > + compatible = "regulator-fixed"; > + regulator-name = "vcc5v0_usb"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + vin-supply = <&dc_12v>; > + }; > + > + vcc5v0_usb_host: vcc5v0-usb-host-regulator { > + compatible = "regulator-fixed"; > + enable-active-high; > + gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&vcc5v0_usb_host_en>; > + regulator-name = "vcc5v0_usb_host"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + vin-supply = <&vcc5v0_usb>; > + }; > + > + vcc5v0_usb_otg: vcc5v0-usb-otg-regulator { > + compatible = "regulator-fixed"; > + enable-active-high; > + gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&vcc5v0_usb_otg_en>; > + regulator-name = "vcc5v0_usb_otg"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + vin-supply = <&vcc5v0_usb>; > + }; > +}; > + > +&combphy0 { > + /* used for USB3 */ > + status = "okay"; > +}; > + > +&combphy1 { > + /* used for USB3 */ > + status = "okay"; > +}; > + > +&combphy2 { > + /* used for SATA */ > + status = "okay"; > +}; > + > +&gmac0 { > + assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; > + assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; > + assigned-clock-rates = <0>, <125000000>; > + clock_in_out = "input"; > + phy-mode = "rgmii"; > + pinctrl-names = "default"; > + pinctrl-0 = <&gmac0_miim > + &gmac0_tx_bus2 > + &gmac0_rx_bus2 > + &gmac0_rgmii_clk > + &gmac0_rgmii_bus>; > + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; > + snps,reset-active-low; > + /* Reset time is 20ms, 100ms for rtl8211f */ > + snps,reset-delays-us = <0 20000 100000>; > + tx_delay = <0x4f>; > + rx_delay = <0x0f>; > + status = "okay"; > + > + fixed-link { > + speed = <1000>; > + full-duplex; > + pause; > + }; > +}; > + > +&gmac1 { > + assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; > + assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>; > + assigned-clock-rates = <0>, <125000000>; > + clock_in_out = "output"; > + phy-handle = <&rgmii_phy1>; > + phy-mode = "rgmii"; > + pinctrl-names = "default"; > + pinctrl-0 = <&gmac1m1_miim > + &gmac1m1_tx_bus2 > + &gmac1m1_rx_bus2 > + &gmac1m1_rgmii_clk > + &gmac1m1_rgmii_bus>; > + snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; > + snps,reset-active-low; > + /* Reset time is 20ms, 100ms for rtl8211f */ > + snps,reset-delays-us = <0 20000 100000>; > + tx_delay = <0x3c>; > + rx_delay = <0x2f>; > + status = "okay"; > +}; > + > +&i2c0 { > + status = "okay"; > + > + rk809: pmic@20 { > + compatible = "rockchip,rk809"; > + reg = <0x20>; > + interrupt-parent = <&gpio0>; > + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; > + #clock-cells = <1>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pmic_int>; > + rockchip,system-power-controller; > + vcc1-supply = <&vcc3v3_sys>; > + vcc2-supply = <&vcc3v3_sys>; > + vcc3-supply = <&vcc3v3_sys>; > + vcc4-supply = <&vcc3v3_sys>; > + vcc5-supply = <&vcc3v3_sys>; > + vcc6-supply = <&vcc3v3_sys>; > + vcc7-supply = <&vcc3v3_sys>; > + vcc8-supply = <&vcc3v3_sys>; > + vcc9-supply = <&vcc3v3_sys>; > + wakeup-source; > + > + regulators { > + vdd_logic: DCDC_REG1 { > + regulator-name = "vdd_logic"; > + regulator-always-on; > + regulator-boot-on; > + regulator-init-microvolt = <900000>; > + regulator-initial-mode = <0x2>; > + regulator-min-microvolt = <500000>; > + regulator-max-microvolt = <1350000>; > + regulator-ramp-delay = <6001>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vdd_gpu: DCDC_REG2 { > + regulator-name = "vdd_gpu"; > + regulator-always-on; > + regulator-init-microvolt = <900000>; > + regulator-initial-mode = <0x2>; > + regulator-min-microvolt = <500000>; > + regulator-max-microvolt = <1350000>; > + regulator-ramp-delay = <6001>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc_ddr: DCDC_REG3 { > + regulator-name = "vcc_ddr"; > + regulator-always-on; > + regulator-boot-on; > + regulator-initial-mode = <0x2>; > + > + regulator-state-mem { > + regulator-on-in-suspend; > + }; > + }; > + > + vdd_npu: DCDC_REG4 { > + regulator-name = "vdd_npu"; > + regulator-init-microvolt = <900000>; > + regulator-initial-mode = <0x2>; > + regulator-min-microvolt = <500000>; > + regulator-max-microvolt = <1350000>; > + regulator-ramp-delay = <6001>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc_1v8: DCDC_REG5 { > + regulator-name = "vcc_1v8"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vdda0v9_image: LDO_REG1 { > + regulator-name = "vdda0v9_image"; > + regulator-always-on; > + regulator-min-microvolt = <900000>; > + regulator-max-microvolt = <900000>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vdda_0v9: LDO_REG2 { > + regulator-name = "vdda_0v9"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <900000>; > + regulator-max-microvolt = <900000>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vdda0v9_pmu: LDO_REG3 { > + regulator-name = "vdda0v9_pmu"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <900000>; > + regulator-max-microvolt = <900000>; > + > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <900000>; > + }; > + }; > + > + vccio_acodec: LDO_REG4 { > + regulator-name = "vccio_acodec"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vccio_sd: LDO_REG5 { > + regulator-name = "vccio_sd"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <3300000>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc3v3_pmu: LDO_REG6 { > + regulator-name = "vcc3v3_pmu"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <3300000>; > + }; > + }; > + > + vcca_1v8: LDO_REG7 { > + regulator-name = "vcca_1v8"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcca1v8_pmu: LDO_REG8 { > + regulator-name = "vcca1v8_pmu"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <1800000>; > + }; > + }; > + > + vcca1v8_image: LDO_REG9 { > + regulator-name = "vcca1v8_image"; > + regulator-always-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc_3v3: SWITCH_REG1 { > + regulator-name = "vcc_3v3"; > + regulator-always-on; > + regulator-boot-on; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc3v3_sd: SWITCH_REG2 { > + regulator-name = "vcc3v3_sd"; > + regulator-always-on; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + }; > + }; > +}; > + > +&i2c3 { > + status = "okay"; > + > + hym8563: rtc@51 { > + compatible = "haoyu,hym8563"; > + reg = <0x51>; > + interrupt-parent = <&gpio0>; > + interrupts = <RK_PD3 IRQ_TYPE_EDGE_FALLING>; > + #clock-cells = <0>; > + clock-output-names = "rtcic_32kout"; > + pinctrl-names = "default"; > + pinctrl-0 = <&hym8563_int>; > + wakeup-source; > + }; > +}; > + > +&i2c5 { > + /* pin 3 (SDA) + 4 (SCL) of header con2 */ > + status = "disabled"; > +}; > + > +&mdio0 { > + #address-cells = <1>; > + #size-cells = <0>; > + > + switch@0 { > + compatible = "mediatek,mt7531"; > + reg = <0>; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@1 { > + reg = <1>; > + label = "lan0"; > + }; > + > + port@2 { > + reg = <2>; > + label = "lan1"; > + }; > + > + port@3 { > + reg = <3>; > + label = "lan2"; > + }; > + > + port@4 { > + reg = <4>; > + label = "lan3"; > + }; > + > + port@5 { > + reg = <5>; > + label = "cpu"; > + ethernet = <&gmac0>; > + phy-mode = "rgmii"; > + > + fixed-link { > + speed = <1000>; > + full-duplex; > + pause; > + }; > + }; > + }; > + }; > +}; > + > +&mdio1 { > + rgmii_phy1: ethernet-phy@0 { > + compatible = "ethernet-phy-ieee802.3-c22"; > + reg = <0x0>; > + }; > +}; > + > +&pinctrl { > + leds { > + blue_led_pin: blue-led-pin { > + rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + green_led_pin: green-led-pin { > + rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > + > + hym8563 { > + hym8563_int: hym8563-int { > + rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > + > + pmic { > + pmic_int: pmic_int { > + rockchip,pins = > + <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; > + }; > + }; > + > + usb { > + vcc5v0_usb_host_en: vcc5v0_usb_host_en { > + rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + > + vcc5v0_usb_otg_en: vcc5v0_usb_otg_en { > + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > +}; > + > +&pmu_io_domains { > + pmuio1-supply = <&vcc3v3_pmu>; > + pmuio2-supply = <&vcc3v3_pmu>; > + vccio1-supply = <&vccio_acodec>; > + vccio3-supply = <&vccio_sd>; > + vccio4-supply = <&vcc_3v3>; > + vccio5-supply = <&vcc_3v3>; > + vccio6-supply = <&vcc_1v8>; > + vccio7-supply = <&vcc_3v3>; > + status = "okay"; > +}; > + > +&saradc { > + vref-supply = <&vcca_1v8>; > + status = "okay"; > +}; > + > +&sata2 { > + status = "okay"; > +}; > + > +&sdhci { > + bus-width = <8>; > + max-frequency = <200000000>; > + non-removable; > + pinctrl-names = "default"; > + pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; > + status = "okay"; > +}; > + > +&sdmmc0 { > + bus-width = <4>; > + cap-sd-highspeed; > + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; > + disable-wp; > + pinctrl-names = "default"; > + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; > + sd-uhs-sdr104; > + vmmc-supply = <&vcc3v3_sd>; > + vqmmc-supply = <&vccio_sd>; > + status = "okay"; > +}; > + > +&tsadc { > + rockchip,hw-tshut-mode = <1>; > + rockchip,hw-tshut-polarity = <0>; > + status = "okay"; > +}; > + > +&uart2 { > + /* debug-uart */ > + status = "okay"; > +}; > + > +&usb_host0_ehci { > + status = "okay"; > +}; > + > +&usb_host0_ohci { > + status = "okay"; > +}; > + > +&usb_host0_xhci { > + extcon = <&usb2phy0>; > + dr_mode = "host"; > + status = "okay"; > +}; > + > +&usb_host1_ehci { > + status = "okay"; > +}; > + > +&usb_host1_ohci { > + status = "okay"; > +}; > + > +&usb_host1_xhci { > + status = "okay"; > +}; > + > +&usb2phy0 { > + status = "okay"; > +}; > + > +&usb2phy0_host { > + phy-supply = <&vcc5v0_usb_host>; > + status = "okay"; > +}; > + > +&usb2phy0_otg { > + phy-supply = <&vcc5v0_usb_otg>; > + status = "okay"; > +}; > + > diff --git a/configs/bpi-r2pro-rk3568_defconfig b/configs/bpi-r2pro-rk3568_defconfig > new file mode 100644 > index 000000000000..e8936261eab3 > --- /dev/null > +++ b/configs/bpi-r2pro-rk3568_defconfig > @@ -0,0 +1,101 @@ > +CONFIG_ARM=y > +CONFIG_SKIP_LOWLEVEL_INIT=y > +CONFIG_COUNTER_FREQUENCY=24000000 > +CONFIG_ARCH_ROCKCHIP=y > +CONFIG_TEXT_BASE=0x00a00000 > +CONFIG_SPL_LIBCOMMON_SUPPORT=y > +CONFIG_SPL_LIBGENERIC_SUPPORT=y > +CONFIG_NR_DRAM_BANKS=2 > +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y > +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 > +CONFIG_DEFAULT_DEVICE_TREE="rk3568-bpi-r2pro" > +CONFIG_ROCKCHIP_RK3568=y > +CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y > +CONFIG_SPL_SERIAL=y > +CONFIG_SPL_STACK_R_ADDR=0x600000 > +CONFIG_SPL_STACK=0x400000 > +CONFIG_DEBUG_UART_BASE=0xFE660000 > +CONFIG_DEBUG_UART_CLOCK=24000000 > +CONFIG_SYS_LOAD_ADDR=0xc00800 > +CONFIG_DEBUG_UART=y > +CONFIG_FIT=y > +CONFIG_FIT_VERBOSE=y > +CONFIG_SPL_FIT_SIGNATURE=y > +CONFIG_SPL_LOAD_FIT=y > +CONFIG_LEGACY_IMAGE_FORMAT=y > +#CONFIG_OF_SYSTEM_SETUP=y > +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-bpi-r2pro" > +# CONFIG_DISPLAY_CPUINFO is not set > +CONFIG_DISPLAY_BOARDINFO_LATE=y > +CONFIG_SPL_MAX_SIZE=0x40000 > +CONFIG_SPL_PAD_TO=0x7f8000 > +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y > +CONFIG_SPL_BSS_START_ADDR=0x4000000 > +CONFIG_SPL_BSS_MAX_SIZE=0x4000 > +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set > +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set > +CONFIG_SPL_STACK_R=y > +CONFIG_SPL_ATF=y > +CONFIG_CMD_GPIO=y > +CONFIG_CMD_GPT=y > +CONFIG_CMD_I2C=y > +CONFIG_CMD_MMC=y > +CONFIG_CMD_PMIC=y > +CONFIG_CMD_REGULATOR=y > +# CONFIG_SPL_DOS_PARTITION is not set > +CONFIG_SPL_OF_CONTROL=y > +CONFIG_OF_LIVE=y > +CONFIG_NET=n > +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" > +CONFIG_SPL_REGMAP=y > +CONFIG_SPL_SYSCON=y > +CONFIG_SPL_CLK=y > +CONFIG_ROCKCHIP_GPIO=y > +CONFIG_ROCKCHIP_GPIO_V2=y > +CONFIG_SYS_I2C_ROCKCHIP=y > +CONFIG_MISC=y > +CONFIG_SUPPORT_EMMC_RPMB=y > +CONFIG_MMC_DW=y > +CONFIG_MMC_DW_ROCKCHIP=y > +CONFIG_MMC_SDHCI=y > +CONFIG_MMC_SDHCI_SDMA=y > +CONFIG_MMC_SDHCI_ROCKCHIP=y > +CONFIG_ETH_DESIGNWARE=y > +CONFIG_GMAC_ROCKCHIP=y > +CONFIG_DM_PMIC=y > +CONFIG_PMIC_RK8XX=y > +CONFIG_REGULATOR_RK8XX=y > +CONFIG_REGULATOR_PWM=y > +CONFIG_PWM_ROCKCHIP=y > +CONFIG_SPL_RAM=y > +CONFIG_BAUDRATE=1500000 > +CONFIG_DEBUG_UART_SHIFT=2 > +CONFIG_SYS_NS16550_MEM32=y > +CONFIG_SYSRESET=y > +CONFIG_SYSRESET_PSCI=y > +CONFIG_ERRNO_STR=y > +CONFIG_SYS_PROMPT="BPI-R2PRO> " > +CONFIG_CMD_SYSBOOT=y > +CONFIG_CMD_BOOTDEV=y > +CONFIG_BOOTSTD_FULL=y > +CONFIG_CMD_EFICONFIG=n > +CONFIG_EFI_LOADER=n > +CONFIG_USB=y > +CONFIG_USB_XHCI_HCD=y > +CONFIG_USB_XHCI_DWC3=y > +CONFIG_USB_DWC3_GENERIC=y > +CONFIG_USB_EHCI_HCD=y > +CONFIG_USB_EHCI_GENERIC=y > +CONFIG_USB_OHCI_HCD=y > +CONFIG_USB_OHCI_GENERIC=y > +CONFIG_USB_UHCI_HCD=y > +CONFIG_USB_DWC2=y > +CONFIG_USB_DWC3=y > +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y > +CONFIG_PHY_ROCKCHIP_INNO_USB2=y > +CONFIG_CMD_USB=y > +CONFIG_AHCI=y > +CONFIG_DWC_AHCI=y > +CONFIG_SCSI=y > +CONFIG_DM_SCSI=y > +CONFIG_CMD_SCSI=y > -- > 2.34.1 >
> Gesendet: Montag, 07. August 2023 um 19:20 Uhr > Von: "Pali Rohár" <pali@kernel.org> > Could you stop sending me these rockchip emails? What is not > understandable on the fact that I'm not rockchip maintainer? > https://lists.denx.de/pipermail/u-boot/2023-March/511199.html > https://lists.denx.de/pipermail/u-boot/2023-April/515012.html sorry, but maintainer.pl returns you for the changes (added_lines:16/181=9%,removed_lines:12/62=19%)...not maintainer, but because of email i thought it could be interesting for you too...sorry about that. maintainers.pl imho should not return you here (i guess because of vendor-independ arm/dts directory/makefile). Dropped some more people from thread which may not involved into rockchip-changes. maybe this should be changed like linux kernel does for arm64 (dts/<vendor>/...)? then maintainer-script can show the right people here. regards Frank
On Mon, Aug 07, 2023 at 07:54:19PM +0200, Frank Wunderlich wrote: > > Gesendet: Montag, 07. August 2023 um 19:20 Uhr > > Von: "Pali Rohár" <pali@kernel.org> > > Could you stop sending me these rockchip emails? What is not > > understandable on the fact that I'm not rockchip maintainer? > > https://lists.denx.de/pipermail/u-boot/2023-March/511199.html > > https://lists.denx.de/pipermail/u-boot/2023-April/515012.html > > sorry, but maintainer.pl returns you for the changes (added_lines:16/181=9%,removed_lines:12/62=19%)...not maintainer, but because of email i thought it could be interesting for you too...sorry about that. > > maintainers.pl imho should not return you here (i guess because of vendor-independ arm/dts directory/makefile). > > Dropped some more people from thread which may not involved into rockchip-changes. > > maybe this should be changed like linux kernel does for arm64 (dts/<vendor>/...)? then maintainer-script can show the right people here. The main thing that helps the kernel is that arch/arm/boot/dts/Makefile is explicitly listed in a MAINTAINERS entry (same for arm64). The vendor directories largely aren't, so random board contributors will get emails at some point.
Hi Frank, On 2023/8/8 01:14, Frank Wunderlich wrote: > From: Frank Wunderlich <frank-w@public-files.de> > > Add rk3568 based Bananapi R2 Pro board. > > Signed-off-by: Frank Wunderlich <frank-w@public-files.de> > --- > because iodomain is different to evb and now iodomain driver is sent as > patch we need to separate between EVB and R2Pro else board can be bricked. What's the detail difference before and after the iodomain driver for this board? > --- > arch/arm/dts/Makefile | 3 +- > arch/arm/dts/rk3568-bpi-r2pro-u-boot.dtsi | 23 + > arch/arm/dts/rk3568-bpi-r2pro.dts | 597 ++++++++++++++++++++++ Does this dts already available in mainline kernel, if yes, please add info in commit message. Thanks, - Kever > configs/bpi-r2pro-rk3568_defconfig | 101 ++++ > 4 files changed, 723 insertions(+), 1 deletion(-) > create mode 100644 arch/arm/dts/rk3568-bpi-r2pro-u-boot.dtsi > create mode 100644 arch/arm/dts/rk3568-bpi-r2pro.dts > create mode 100644 configs/bpi-r2pro-rk3568_defconfig > > diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile > index 8f43dba58632..1bd48a7e0535 100644 > --- a/arch/arm/dts/Makefile > +++ b/arch/arm/dts/Makefile > @@ -182,7 +182,8 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \ > rk3568-nanopi-r5s.dtb \ > rk3568-odroid-m1.dtb \ > rk3568-radxa-e25.dtb \ > - rk3568-rock-3a.dtb > + rk3568-rock-3a.dtb \ > + rk3568-bpi-r2pro.dtb > > dtb-$(CONFIG_ROCKCHIP_RK3588) += \ > rk3588-edgeble-neu6a-io.dtb \ > diff --git a/arch/arm/dts/rk3568-bpi-r2pro-u-boot.dtsi b/arch/arm/dts/rk3568-bpi-r2pro-u-boot.dtsi > new file mode 100644 > index 000000000000..382a52a28b10 > --- /dev/null > +++ b/arch/arm/dts/rk3568-bpi-r2pro-u-boot.dtsi > @@ -0,0 +1,23 @@ > +// SPDX-License-Identifier: GPL-2.0+ > +/* > + * (C) Copyright 2021 Rockchip Electronics Co., Ltd > + */ > + > +#include "rk356x-u-boot.dtsi" > + > +/ { > + chosen { > + stdout-path = &uart2; > + u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci; > + }; > +}; > + > +&sdmmc0 { > + status = "okay"; > +}; > + > +&uart2 { > + clock-frequency = <24000000>; > + bootph-pre-ram; > + status = "okay"; > +}; > diff --git a/arch/arm/dts/rk3568-bpi-r2pro.dts b/arch/arm/dts/rk3568-bpi-r2pro.dts > new file mode 100644 > index 000000000000..9295e9836a56 > --- /dev/null > +++ b/arch/arm/dts/rk3568-bpi-r2pro.dts > @@ -0,0 +1,597 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) > +/* > + * Author: Frank Wunderlich <frank-w@public-files.de> > + * > + */ > + > +/dts-v1/; > +#include <dt-bindings/gpio/gpio.h> > +#include <dt-bindings/leds/common.h> > +#include <dt-bindings/pinctrl/rockchip.h> > +#include "rk3568.dtsi" > + > +/ { > + model = "Bananapi-R2 Pro (RK3568) DDR4 Board"; > + compatible = "rockchip,rk3568-bpi-r2pro", "rockchip,rk3568"; > + > + aliases { > + ethernet0 = &gmac0; > + ethernet1 = &gmac1; > + mmc0 = &sdmmc0; > + mmc1 = &sdhci; > + }; > + > + chosen: chosen { > + stdout-path = "serial2:1500000n8"; > + }; > + > + leds { > + compatible = "gpio-leds"; > + pinctrl-names = "default"; > + pinctrl-0 = <&blue_led_pin &green_led_pin>; > + > + blue_led: led-0 { > + color = <LED_COLOR_ID_BLUE>; > + default-state = "off"; > + function = LED_FUNCTION_STATUS; > + gpios = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>; > + }; > + > + green_led: led-1 { > + color = <LED_COLOR_ID_GREEN>; > + default-state = "on"; > + function = LED_FUNCTION_POWER; > + gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; > + }; > + }; > + > + dc_12v: dc-12v-regulator { > + compatible = "regulator-fixed"; > + regulator-name = "dc_12v"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <12000000>; > + regulator-max-microvolt = <12000000>; > + }; > + > + vcc3v3_sys: vcc3v3-sys-regulator { > + compatible = "regulator-fixed"; > + regulator-name = "vcc3v3_sys"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + vin-supply = <&dc_12v>; > + }; > + > + vcc5v0_sys: vcc5v0-sys-regulator { > + compatible = "regulator-fixed"; > + regulator-name = "vcc5v0_sys"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + vin-supply = <&dc_12v>; > + }; > + > + vcc5v0_usb: vcc5v0-usb-regulator { > + compatible = "regulator-fixed"; > + regulator-name = "vcc5v0_usb"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + vin-supply = <&dc_12v>; > + }; > + > + vcc5v0_usb_host: vcc5v0-usb-host-regulator { > + compatible = "regulator-fixed"; > + enable-active-high; > + gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&vcc5v0_usb_host_en>; > + regulator-name = "vcc5v0_usb_host"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + vin-supply = <&vcc5v0_usb>; > + }; > + > + vcc5v0_usb_otg: vcc5v0-usb-otg-regulator { > + compatible = "regulator-fixed"; > + enable-active-high; > + gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; > + pinctrl-names = "default"; > + pinctrl-0 = <&vcc5v0_usb_otg_en>; > + regulator-name = "vcc5v0_usb_otg"; > + regulator-min-microvolt = <5000000>; > + regulator-max-microvolt = <5000000>; > + vin-supply = <&vcc5v0_usb>; > + }; > +}; > + > +&combphy0 { > + /* used for USB3 */ > + status = "okay"; > +}; > + > +&combphy1 { > + /* used for USB3 */ > + status = "okay"; > +}; > + > +&combphy2 { > + /* used for SATA */ > + status = "okay"; > +}; > + > +&gmac0 { > + assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; > + assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; > + assigned-clock-rates = <0>, <125000000>; > + clock_in_out = "input"; > + phy-mode = "rgmii"; > + pinctrl-names = "default"; > + pinctrl-0 = <&gmac0_miim > + &gmac0_tx_bus2 > + &gmac0_rx_bus2 > + &gmac0_rgmii_clk > + &gmac0_rgmii_bus>; > + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; > + snps,reset-active-low; > + /* Reset time is 20ms, 100ms for rtl8211f */ > + snps,reset-delays-us = <0 20000 100000>; > + tx_delay = <0x4f>; > + rx_delay = <0x0f>; > + status = "okay"; > + > + fixed-link { > + speed = <1000>; > + full-duplex; > + pause; > + }; > +}; > + > +&gmac1 { > + assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; > + assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>; > + assigned-clock-rates = <0>, <125000000>; > + clock_in_out = "output"; > + phy-handle = <&rgmii_phy1>; > + phy-mode = "rgmii"; > + pinctrl-names = "default"; > + pinctrl-0 = <&gmac1m1_miim > + &gmac1m1_tx_bus2 > + &gmac1m1_rx_bus2 > + &gmac1m1_rgmii_clk > + &gmac1m1_rgmii_bus>; > + snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; > + snps,reset-active-low; > + /* Reset time is 20ms, 100ms for rtl8211f */ > + snps,reset-delays-us = <0 20000 100000>; > + tx_delay = <0x3c>; > + rx_delay = <0x2f>; > + status = "okay"; > +}; > + > +&i2c0 { > + status = "okay"; > + > + rk809: pmic@20 { > + compatible = "rockchip,rk809"; > + reg = <0x20>; > + interrupt-parent = <&gpio0>; > + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; > + #clock-cells = <1>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pmic_int>; > + rockchip,system-power-controller; > + vcc1-supply = <&vcc3v3_sys>; > + vcc2-supply = <&vcc3v3_sys>; > + vcc3-supply = <&vcc3v3_sys>; > + vcc4-supply = <&vcc3v3_sys>; > + vcc5-supply = <&vcc3v3_sys>; > + vcc6-supply = <&vcc3v3_sys>; > + vcc7-supply = <&vcc3v3_sys>; > + vcc8-supply = <&vcc3v3_sys>; > + vcc9-supply = <&vcc3v3_sys>; > + wakeup-source; > + > + regulators { > + vdd_logic: DCDC_REG1 { > + regulator-name = "vdd_logic"; > + regulator-always-on; > + regulator-boot-on; > + regulator-init-microvolt = <900000>; > + regulator-initial-mode = <0x2>; > + regulator-min-microvolt = <500000>; > + regulator-max-microvolt = <1350000>; > + regulator-ramp-delay = <6001>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vdd_gpu: DCDC_REG2 { > + regulator-name = "vdd_gpu"; > + regulator-always-on; > + regulator-init-microvolt = <900000>; > + regulator-initial-mode = <0x2>; > + regulator-min-microvolt = <500000>; > + regulator-max-microvolt = <1350000>; > + regulator-ramp-delay = <6001>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc_ddr: DCDC_REG3 { > + regulator-name = "vcc_ddr"; > + regulator-always-on; > + regulator-boot-on; > + regulator-initial-mode = <0x2>; > + > + regulator-state-mem { > + regulator-on-in-suspend; > + }; > + }; > + > + vdd_npu: DCDC_REG4 { > + regulator-name = "vdd_npu"; > + regulator-init-microvolt = <900000>; > + regulator-initial-mode = <0x2>; > + regulator-min-microvolt = <500000>; > + regulator-max-microvolt = <1350000>; > + regulator-ramp-delay = <6001>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc_1v8: DCDC_REG5 { > + regulator-name = "vcc_1v8"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vdda0v9_image: LDO_REG1 { > + regulator-name = "vdda0v9_image"; > + regulator-always-on; > + regulator-min-microvolt = <900000>; > + regulator-max-microvolt = <900000>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vdda_0v9: LDO_REG2 { > + regulator-name = "vdda_0v9"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <900000>; > + regulator-max-microvolt = <900000>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vdda0v9_pmu: LDO_REG3 { > + regulator-name = "vdda0v9_pmu"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <900000>; > + regulator-max-microvolt = <900000>; > + > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <900000>; > + }; > + }; > + > + vccio_acodec: LDO_REG4 { > + regulator-name = "vccio_acodec"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vccio_sd: LDO_REG5 { > + regulator-name = "vccio_sd"; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <3300000>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc3v3_pmu: LDO_REG6 { > + regulator-name = "vcc3v3_pmu"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <3300000>; > + regulator-max-microvolt = <3300000>; > + > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <3300000>; > + }; > + }; > + > + vcca_1v8: LDO_REG7 { > + regulator-name = "vcca_1v8"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcca1v8_pmu: LDO_REG8 { > + regulator-name = "vcca1v8_pmu"; > + regulator-always-on; > + regulator-boot-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + > + regulator-state-mem { > + regulator-on-in-suspend; > + regulator-suspend-microvolt = <1800000>; > + }; > + }; > + > + vcca1v8_image: LDO_REG9 { > + regulator-name = "vcca1v8_image"; > + regulator-always-on; > + regulator-min-microvolt = <1800000>; > + regulator-max-microvolt = <1800000>; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc_3v3: SWITCH_REG1 { > + regulator-name = "vcc_3v3"; > + regulator-always-on; > + regulator-boot-on; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + > + vcc3v3_sd: SWITCH_REG2 { > + regulator-name = "vcc3v3_sd"; > + regulator-always-on; > + > + regulator-state-mem { > + regulator-off-in-suspend; > + }; > + }; > + }; > + }; > +}; > + > +&i2c3 { > + status = "okay"; > + > + hym8563: rtc@51 { > + compatible = "haoyu,hym8563"; > + reg = <0x51>; > + interrupt-parent = <&gpio0>; > + interrupts = <RK_PD3 IRQ_TYPE_EDGE_FALLING>; > + #clock-cells = <0>; > + clock-output-names = "rtcic_32kout"; > + pinctrl-names = "default"; > + pinctrl-0 = <&hym8563_int>; > + wakeup-source; > + }; > +}; > + > +&i2c5 { > + /* pin 3 (SDA) + 4 (SCL) of header con2 */ > + status = "disabled"; > +}; > + > +&mdio0 { > + #address-cells = <1>; > + #size-cells = <0>; > + > + switch@0 { > + compatible = "mediatek,mt7531"; > + reg = <0>; > + > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@1 { > + reg = <1>; > + label = "lan0"; > + }; > + > + port@2 { > + reg = <2>; > + label = "lan1"; > + }; > + > + port@3 { > + reg = <3>; > + label = "lan2"; > + }; > + > + port@4 { > + reg = <4>; > + label = "lan3"; > + }; > + > + port@5 { > + reg = <5>; > + label = "cpu"; > + ethernet = <&gmac0>; > + phy-mode = "rgmii"; > + > + fixed-link { > + speed = <1000>; > + full-duplex; > + pause; > + }; > + }; > + }; > + }; > +}; > + > +&mdio1 { > + rgmii_phy1: ethernet-phy@0 { > + compatible = "ethernet-phy-ieee802.3-c22"; > + reg = <0x0>; > + }; > +}; > + > +&pinctrl { > + leds { > + blue_led_pin: blue-led-pin { > + rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + green_led_pin: green-led-pin { > + rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > + > + hym8563 { > + hym8563_int: hym8563-int { > + rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > + > + pmic { > + pmic_int: pmic_int { > + rockchip,pins = > + <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; > + }; > + }; > + > + usb { > + vcc5v0_usb_host_en: vcc5v0_usb_host_en { > + rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + > + vcc5v0_usb_otg_en: vcc5v0_usb_otg_en { > + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; > + }; > + }; > +}; > + > +&pmu_io_domains { > + pmuio1-supply = <&vcc3v3_pmu>; > + pmuio2-supply = <&vcc3v3_pmu>; > + vccio1-supply = <&vccio_acodec>; > + vccio3-supply = <&vccio_sd>; > + vccio4-supply = <&vcc_3v3>; > + vccio5-supply = <&vcc_3v3>; > + vccio6-supply = <&vcc_1v8>; > + vccio7-supply = <&vcc_3v3>; > + status = "okay"; > +}; > + > +&saradc { > + vref-supply = <&vcca_1v8>; > + status = "okay"; > +}; > + > +&sata2 { > + status = "okay"; > +}; > + > +&sdhci { > + bus-width = <8>; > + max-frequency = <200000000>; > + non-removable; > + pinctrl-names = "default"; > + pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; > + status = "okay"; > +}; > + > +&sdmmc0 { > + bus-width = <4>; > + cap-sd-highspeed; > + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; > + disable-wp; > + pinctrl-names = "default"; > + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; > + sd-uhs-sdr104; > + vmmc-supply = <&vcc3v3_sd>; > + vqmmc-supply = <&vccio_sd>; > + status = "okay"; > +}; > + > +&tsadc { > + rockchip,hw-tshut-mode = <1>; > + rockchip,hw-tshut-polarity = <0>; > + status = "okay"; > +}; > + > +&uart2 { > + /* debug-uart */ > + status = "okay"; > +}; > + > +&usb_host0_ehci { > + status = "okay"; > +}; > + > +&usb_host0_ohci { > + status = "okay"; > +}; > + > +&usb_host0_xhci { > + extcon = <&usb2phy0>; > + dr_mode = "host"; > + status = "okay"; > +}; > + > +&usb_host1_ehci { > + status = "okay"; > +}; > + > +&usb_host1_ohci { > + status = "okay"; > +}; > + > +&usb_host1_xhci { > + status = "okay"; > +}; > + > +&usb2phy0 { > + status = "okay"; > +}; > + > +&usb2phy0_host { > + phy-supply = <&vcc5v0_usb_host>; > + status = "okay"; > +}; > + > +&usb2phy0_otg { > + phy-supply = <&vcc5v0_usb_otg>; > + status = "okay"; > +}; > + > diff --git a/configs/bpi-r2pro-rk3568_defconfig b/configs/bpi-r2pro-rk3568_defconfig > new file mode 100644 > index 000000000000..e8936261eab3 > --- /dev/null > +++ b/configs/bpi-r2pro-rk3568_defconfig > @@ -0,0 +1,101 @@ > +CONFIG_ARM=y > +CONFIG_SKIP_LOWLEVEL_INIT=y > +CONFIG_COUNTER_FREQUENCY=24000000 > +CONFIG_ARCH_ROCKCHIP=y > +CONFIG_TEXT_BASE=0x00a00000 > +CONFIG_SPL_LIBCOMMON_SUPPORT=y > +CONFIG_SPL_LIBGENERIC_SUPPORT=y > +CONFIG_NR_DRAM_BANKS=2 > +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y > +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 > +CONFIG_DEFAULT_DEVICE_TREE="rk3568-bpi-r2pro" > +CONFIG_ROCKCHIP_RK3568=y > +CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y > +CONFIG_SPL_SERIAL=y > +CONFIG_SPL_STACK_R_ADDR=0x600000 > +CONFIG_SPL_STACK=0x400000 > +CONFIG_DEBUG_UART_BASE=0xFE660000 > +CONFIG_DEBUG_UART_CLOCK=24000000 > +CONFIG_SYS_LOAD_ADDR=0xc00800 > +CONFIG_DEBUG_UART=y > +CONFIG_FIT=y > +CONFIG_FIT_VERBOSE=y > +CONFIG_SPL_FIT_SIGNATURE=y > +CONFIG_SPL_LOAD_FIT=y > +CONFIG_LEGACY_IMAGE_FORMAT=y > +#CONFIG_OF_SYSTEM_SETUP=y > +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-bpi-r2pro" > +# CONFIG_DISPLAY_CPUINFO is not set > +CONFIG_DISPLAY_BOARDINFO_LATE=y > +CONFIG_SPL_MAX_SIZE=0x40000 > +CONFIG_SPL_PAD_TO=0x7f8000 > +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y > +CONFIG_SPL_BSS_START_ADDR=0x4000000 > +CONFIG_SPL_BSS_MAX_SIZE=0x4000 > +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set > +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set > +CONFIG_SPL_STACK_R=y > +CONFIG_SPL_ATF=y > +CONFIG_CMD_GPIO=y > +CONFIG_CMD_GPT=y > +CONFIG_CMD_I2C=y > +CONFIG_CMD_MMC=y > +CONFIG_CMD_PMIC=y > +CONFIG_CMD_REGULATOR=y > +# CONFIG_SPL_DOS_PARTITION is not set > +CONFIG_SPL_OF_CONTROL=y > +CONFIG_OF_LIVE=y > +CONFIG_NET=n > +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" > +CONFIG_SPL_REGMAP=y > +CONFIG_SPL_SYSCON=y > +CONFIG_SPL_CLK=y > +CONFIG_ROCKCHIP_GPIO=y > +CONFIG_ROCKCHIP_GPIO_V2=y > +CONFIG_SYS_I2C_ROCKCHIP=y > +CONFIG_MISC=y > +CONFIG_SUPPORT_EMMC_RPMB=y > +CONFIG_MMC_DW=y > +CONFIG_MMC_DW_ROCKCHIP=y > +CONFIG_MMC_SDHCI=y > +CONFIG_MMC_SDHCI_SDMA=y > +CONFIG_MMC_SDHCI_ROCKCHIP=y > +CONFIG_ETH_DESIGNWARE=y > +CONFIG_GMAC_ROCKCHIP=y > +CONFIG_DM_PMIC=y > +CONFIG_PMIC_RK8XX=y > +CONFIG_REGULATOR_RK8XX=y > +CONFIG_REGULATOR_PWM=y > +CONFIG_PWM_ROCKCHIP=y > +CONFIG_SPL_RAM=y > +CONFIG_BAUDRATE=1500000 > +CONFIG_DEBUG_UART_SHIFT=2 > +CONFIG_SYS_NS16550_MEM32=y > +CONFIG_SYSRESET=y > +CONFIG_SYSRESET_PSCI=y > +CONFIG_ERRNO_STR=y > +CONFIG_SYS_PROMPT="BPI-R2PRO> " > +CONFIG_CMD_SYSBOOT=y > +CONFIG_CMD_BOOTDEV=y > +CONFIG_BOOTSTD_FULL=y > +CONFIG_CMD_EFICONFIG=n > +CONFIG_EFI_LOADER=n > +CONFIG_USB=y > +CONFIG_USB_XHCI_HCD=y > +CONFIG_USB_XHCI_DWC3=y > +CONFIG_USB_DWC3_GENERIC=y > +CONFIG_USB_EHCI_HCD=y > +CONFIG_USB_EHCI_GENERIC=y > +CONFIG_USB_OHCI_HCD=y > +CONFIG_USB_OHCI_GENERIC=y > +CONFIG_USB_UHCI_HCD=y > +CONFIG_USB_DWC2=y > +CONFIG_USB_DWC3=y > +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y > +CONFIG_PHY_ROCKCHIP_INNO_USB2=y > +CONFIG_CMD_USB=y > +CONFIG_AHCI=y > +CONFIG_DWC_AHCI=y > +CONFIG_SCSI=y > +CONFIG_DM_SCSI=y > +CONFIG_CMD_SCSI=y
Hi > Gesendet: Samstag, 12. August 2023 um 03:50 Uhr > Von: "Kever Yang" <kever.yang@rock-chips.com> > An: "Frank Wunderlich" <linux@fw-web.de>, u-boot@lists.denx.de > Cc: "Frank Wunderlich" <frank-w@public-files.de>, "Simon Glass" <sjg@chromium.org>, "Philipp Tomsich" <philipp.tomsich@vrull.eu>, "Jonas Karlman" <jonas@kwiboo.se>, "Jagan Teki" <jagan@edgeble.ai>, "zhangqing" <zhangqing@rock-chips.com> > Betreff: Re: [PATCH v1] board: rockchip: Add Bananapi R2Pro Board > > Hi Frank, > > On 2023/8/8 01:14, Frank Wunderlich wrote: > > From: Frank Wunderlich <frank-w@public-files.de> > > > > Add rk3568 based Bananapi R2 Pro board. > > > > Signed-off-by: Frank Wunderlich <frank-w@public-files.de> > > --- > > because iodomain is different to evb and now iodomain driver is sent as > > patch we need to separate between EVB and R2Pro else board can be bricked. > What's the detail difference before and after the iodomain driver for > this board? > > --- > > arch/arm/dts/Makefile | 3 +- > > arch/arm/dts/rk3568-bpi-r2pro-u-boot.dtsi | 23 + > > arch/arm/dts/rk3568-bpi-r2pro.dts | 597 ++++++++++++++++++++++ > > Does this dts already available in mainline kernel, if yes, please > add info in commit message. yes: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/boot/dts/rockchip/rk3568-bpi-r2-pro.dts should i really add this link to commit description? i tried to leave dts compatible with linux dts and only added relevant parts, but switch-driver works differently in uboot so i dropped it in v2 (and plan to disable gmac in v3). have not yet tried ethernet. only bootup, usb and sata (mmc is same as evb). as u-boot doesn't care iodomain till jonas patches i have used evb devicetree/defconfig, but if this gets activated and users do not recognize this they brick their board. So imho this should be added before iodomain gets enabled in evb defconfig. > Thanks, > > - Kever
Am 12. August 2023 03:50:14 MESZ schrieb Kever Yang <kever.yang@rock-chips.com>: >Hi Frank, > >On 2023/8/8 01:14, Frank Wunderlich wrote: >> From: Frank Wunderlich <frank-w@public-files.de> >> >> Add rk3568 based Bananapi R2 Pro board. >> >> Signed-off-by: Frank Wunderlich <frank-w@public-files.de> >> --- >> because iodomain is different to evb and now iodomain driver is sent as >> patch we need to separate between EVB and R2Pro else board can be bricked. >What's the detail difference before and after the iodomain driver for this board? Sorry, missed this question somehow. Evb defines these iodomains &pmu_io_domains { pmuio1-supply = <&vcc3v3_pmu>; pmuio2-supply = <&vcc3v3_pmu>; vccio1-supply = <&vccio_acodec>; vccio2-supply = <&vcc_1v8>; vccio3-supply = <&vccio_sd>; vccio4-supply = <&vcc_1v8>; vccio5-supply = <&vcc_3v3>; vccio6-supply = <&vcc_1v8>; vccio7-supply = <&vcc_3v3>; status = "okay"; }; So vccio2 and vccio4 are 1v8 too which will brick these 2 io if still using this dts on r2pro which has these 2 3v3 (default). >> diff --git a/arch/arm/dts/rk3568-bpi-r2pro.dts b/arch/arm/dts/rk3568-bpi-r2pro.dts >> new file mode 100644 >> index 000000000000..9295e9836a56 >> --- /dev/null >> +++ b/arch/arm/dts/rk3568-bpi-r2pro.dts ... >> +&pmu_io_domains { >> + pmuio1-supply = <&vcc3v3_pmu>; >> + pmuio2-supply = <&vcc3v3_pmu>; >> + vccio1-supply = <&vccio_acodec>; >> + vccio3-supply = <&vccio_sd>; >> + vccio4-supply = <&vcc_3v3>; >> + vccio5-supply = <&vcc_3v3>; >> + vccio6-supply = <&vcc_1v8>; >> + vccio7-supply = <&vcc_3v3>; >> + status = "okay"; >> +}; regards Frank
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 8f43dba58632..1bd48a7e0535 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -182,7 +182,8 @@ dtb-$(CONFIG_ROCKCHIP_RK3568) += \ rk3568-nanopi-r5s.dtb \ rk3568-odroid-m1.dtb \ rk3568-radxa-e25.dtb \ - rk3568-rock-3a.dtb + rk3568-rock-3a.dtb \ + rk3568-bpi-r2pro.dtb dtb-$(CONFIG_ROCKCHIP_RK3588) += \ rk3588-edgeble-neu6a-io.dtb \ diff --git a/arch/arm/dts/rk3568-bpi-r2pro-u-boot.dtsi b/arch/arm/dts/rk3568-bpi-r2pro-u-boot.dtsi new file mode 100644 index 000000000000..382a52a28b10 --- /dev/null +++ b/arch/arm/dts/rk3568-bpi-r2pro-u-boot.dtsi @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * (C) Copyright 2021 Rockchip Electronics Co., Ltd + */ + +#include "rk356x-u-boot.dtsi" + +/ { + chosen { + stdout-path = &uart2; + u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci; + }; +}; + +&sdmmc0 { + status = "okay"; +}; + +&uart2 { + clock-frequency = <24000000>; + bootph-pre-ram; + status = "okay"; +}; diff --git a/arch/arm/dts/rk3568-bpi-r2pro.dts b/arch/arm/dts/rk3568-bpi-r2pro.dts new file mode 100644 index 000000000000..9295e9836a56 --- /dev/null +++ b/arch/arm/dts/rk3568-bpi-r2pro.dts @@ -0,0 +1,597 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Author: Frank Wunderlich <frank-w@public-files.de> + * + */ + +/dts-v1/; +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/leds/common.h> +#include <dt-bindings/pinctrl/rockchip.h> +#include "rk3568.dtsi" + +/ { + model = "Bananapi-R2 Pro (RK3568) DDR4 Board"; + compatible = "rockchip,rk3568-bpi-r2pro", "rockchip,rk3568"; + + aliases { + ethernet0 = &gmac0; + ethernet1 = &gmac1; + mmc0 = &sdmmc0; + mmc1 = &sdhci; + }; + + chosen: chosen { + stdout-path = "serial2:1500000n8"; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&blue_led_pin &green_led_pin>; + + blue_led: led-0 { + color = <LED_COLOR_ID_BLUE>; + default-state = "off"; + function = LED_FUNCTION_STATUS; + gpios = <&gpio0 RK_PD6 GPIO_ACTIVE_HIGH>; + }; + + green_led: led-1 { + color = <LED_COLOR_ID_GREEN>; + default-state = "on"; + function = LED_FUNCTION_POWER; + gpios = <&gpio0 RK_PD5 GPIO_ACTIVE_HIGH>; + }; + }; + + dc_12v: dc-12v-regulator { + compatible = "regulator-fixed"; + regulator-name = "dc_12v"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <12000000>; + regulator-max-microvolt = <12000000>; + }; + + vcc3v3_sys: vcc3v3-sys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc3v3_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&dc_12v>; + }; + + vcc5v0_sys: vcc5v0-sys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_12v>; + }; + + vcc5v0_usb: vcc5v0-usb-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_usb"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&dc_12v>; + }; + + vcc5v0_usb_host: vcc5v0-usb-host-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 RK_PA6 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_usb_host_en>; + regulator-name = "vcc5v0_usb_host"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc5v0_usb>; + }; + + vcc5v0_usb_otg: vcc5v0-usb-otg-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpio = <&gpio0 RK_PA5 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_usb_otg_en>; + regulator-name = "vcc5v0_usb_otg"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + vin-supply = <&vcc5v0_usb>; + }; +}; + +&combphy0 { + /* used for USB3 */ + status = "okay"; +}; + +&combphy1 { + /* used for USB3 */ + status = "okay"; +}; + +&combphy2 { + /* used for SATA */ + status = "okay"; +}; + +&gmac0 { + assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>; + assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>, <&cru CLK_MAC0_2TOP>; + assigned-clock-rates = <0>, <125000000>; + clock_in_out = "input"; + phy-mode = "rgmii"; + pinctrl-names = "default"; + pinctrl-0 = <&gmac0_miim + &gmac0_tx_bus2 + &gmac0_rx_bus2 + &gmac0_rgmii_clk + &gmac0_rgmii_bus>; + snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + /* Reset time is 20ms, 100ms for rtl8211f */ + snps,reset-delays-us = <0 20000 100000>; + tx_delay = <0x4f>; + rx_delay = <0x0f>; + status = "okay"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + }; +}; + +&gmac1 { + assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>; + assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>; + assigned-clock-rates = <0>, <125000000>; + clock_in_out = "output"; + phy-handle = <&rgmii_phy1>; + phy-mode = "rgmii"; + pinctrl-names = "default"; + pinctrl-0 = <&gmac1m1_miim + &gmac1m1_tx_bus2 + &gmac1m1_rx_bus2 + &gmac1m1_rgmii_clk + &gmac1m1_rgmii_bus>; + snps,reset-gpio = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; + snps,reset-active-low; + /* Reset time is 20ms, 100ms for rtl8211f */ + snps,reset-delays-us = <0 20000 100000>; + tx_delay = <0x3c>; + rx_delay = <0x2f>; + status = "okay"; +}; + +&i2c0 { + status = "okay"; + + rk809: pmic@20 { + compatible = "rockchip,rk809"; + reg = <0x20>; + interrupt-parent = <&gpio0>; + interrupts = <RK_PA3 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <1>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int>; + rockchip,system-power-controller; + vcc1-supply = <&vcc3v3_sys>; + vcc2-supply = <&vcc3v3_sys>; + vcc3-supply = <&vcc3v3_sys>; + vcc4-supply = <&vcc3v3_sys>; + vcc5-supply = <&vcc3v3_sys>; + vcc6-supply = <&vcc3v3_sys>; + vcc7-supply = <&vcc3v3_sys>; + vcc8-supply = <&vcc3v3_sys>; + vcc9-supply = <&vcc3v3_sys>; + wakeup-source; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name = "vdd_logic"; + regulator-always-on; + regulator-boot-on; + regulator-init-microvolt = <900000>; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_gpu: DCDC_REG2 { + regulator-name = "vdd_gpu"; + regulator-always-on; + regulator-init-microvolt = <900000>; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-initial-mode = <0x2>; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vdd_npu: DCDC_REG4 { + regulator-name = "vdd_npu"; + regulator-init-microvolt = <900000>; + regulator-initial-mode = <0x2>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1350000>; + regulator-ramp-delay = <6001>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8: DCDC_REG5 { + regulator-name = "vcc_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_image: LDO_REG1 { + regulator-name = "vdda0v9_image"; + regulator-always-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda_0v9: LDO_REG2 { + regulator-name = "vdda_0v9"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdda0v9_pmu: LDO_REG3 { + regulator-name = "vdda0v9_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <900000>; + regulator-max-microvolt = <900000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <900000>; + }; + }; + + vccio_acodec: LDO_REG4 { + regulator-name = "vccio_acodec"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd: LDO_REG5 { + regulator-name = "vccio_sd"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_pmu: LDO_REG6 { + regulator-name = "vcc3v3_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcca_1v8: LDO_REG7 { + regulator-name = "vcca_1v8"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcca1v8_pmu: LDO_REG8 { + regulator-name = "vcca1v8_pmu"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcca1v8_image: LDO_REG9 { + regulator-name = "vcca1v8_image"; + regulator-always-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3: SWITCH_REG1 { + regulator-name = "vcc_3v3"; + regulator-always-on; + regulator-boot-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc3v3_sd: SWITCH_REG2 { + regulator-name = "vcc3v3_sd"; + regulator-always-on; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + +&i2c3 { + status = "okay"; + + hym8563: rtc@51 { + compatible = "haoyu,hym8563"; + reg = <0x51>; + interrupt-parent = <&gpio0>; + interrupts = <RK_PD3 IRQ_TYPE_EDGE_FALLING>; + #clock-cells = <0>; + clock-output-names = "rtcic_32kout"; + pinctrl-names = "default"; + pinctrl-0 = <&hym8563_int>; + wakeup-source; + }; +}; + +&i2c5 { + /* pin 3 (SDA) + 4 (SCL) of header con2 */ + status = "disabled"; +}; + +&mdio0 { + #address-cells = <1>; + #size-cells = <0>; + + switch@0 { + compatible = "mediatek,mt7531"; + reg = <0>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + label = "lan0"; + }; + + port@2 { + reg = <2>; + label = "lan1"; + }; + + port@3 { + reg = <3>; + label = "lan2"; + }; + + port@4 { + reg = <4>; + label = "lan3"; + }; + + port@5 { + reg = <5>; + label = "cpu"; + ethernet = <&gmac0>; + phy-mode = "rgmii"; + + fixed-link { + speed = <1000>; + full-duplex; + pause; + }; + }; + }; + }; +}; + +&mdio1 { + rgmii_phy1: ethernet-phy@0 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <0x0>; + }; +}; + +&pinctrl { + leds { + blue_led_pin: blue-led-pin { + rockchip,pins = <0 RK_PD6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + green_led_pin: green-led-pin { + rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + hym8563 { + hym8563_int: hym8563-int { + rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + pmic { + pmic_int: pmic_int { + rockchip,pins = + <0 RK_PA3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + usb { + vcc5v0_usb_host_en: vcc5v0_usb_host_en { + rockchip,pins = <0 RK_PA6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + vcc5v0_usb_otg_en: vcc5v0_usb_otg_en { + rockchip,pins = <0 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pmu_io_domains { + pmuio1-supply = <&vcc3v3_pmu>; + pmuio2-supply = <&vcc3v3_pmu>; + vccio1-supply = <&vccio_acodec>; + vccio3-supply = <&vccio_sd>; + vccio4-supply = <&vcc_3v3>; + vccio5-supply = <&vcc_3v3>; + vccio6-supply = <&vcc_1v8>; + vccio7-supply = <&vcc_3v3>; + status = "okay"; +}; + +&saradc { + vref-supply = <&vcca_1v8>; + status = "okay"; +}; + +&sata2 { + status = "okay"; +}; + +&sdhci { + bus-width = <8>; + max-frequency = <200000000>; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_bus8 &emmc_clk &emmc_cmd &emmc_datastrobe>; + status = "okay"; +}; + +&sdmmc0 { + bus-width = <4>; + cap-sd-highspeed; + cd-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; + disable-wp; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0_bus4 &sdmmc0_clk &sdmmc0_cmd &sdmmc0_det>; + sd-uhs-sdr104; + vmmc-supply = <&vcc3v3_sd>; + vqmmc-supply = <&vccio_sd>; + status = "okay"; +}; + +&tsadc { + rockchip,hw-tshut-mode = <1>; + rockchip,hw-tshut-polarity = <0>; + status = "okay"; +}; + +&uart2 { + /* debug-uart */ + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host0_xhci { + extcon = <&usb2phy0>; + dr_mode = "host"; + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usb_host1_xhci { + status = "okay"; +}; + +&usb2phy0 { + status = "okay"; +}; + +&usb2phy0_host { + phy-supply = <&vcc5v0_usb_host>; + status = "okay"; +}; + +&usb2phy0_otg { + phy-supply = <&vcc5v0_usb_otg>; + status = "okay"; +}; + diff --git a/configs/bpi-r2pro-rk3568_defconfig b/configs/bpi-r2pro-rk3568_defconfig new file mode 100644 index 000000000000..e8936261eab3 --- /dev/null +++ b/configs/bpi-r2pro-rk3568_defconfig @@ -0,0 +1,101 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_COUNTER_FREQUENCY=24000000 +CONFIG_ARCH_ROCKCHIP=y +CONFIG_TEXT_BASE=0x00a00000 +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_NR_DRAM_BANKS=2 +CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y +CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 +CONFIG_DEFAULT_DEVICE_TREE="rk3568-bpi-r2pro" +CONFIG_ROCKCHIP_RK3568=y +CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y +CONFIG_SPL_SERIAL=y +CONFIG_SPL_STACK_R_ADDR=0x600000 +CONFIG_SPL_STACK=0x400000 +CONFIG_DEBUG_UART_BASE=0xFE660000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SYS_LOAD_ADDR=0xc00800 +CONFIG_DEBUG_UART=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_FIT_SIGNATURE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_LEGACY_IMAGE_FORMAT=y +#CONFIG_OF_SYSTEM_SETUP=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-bpi-r2pro" +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +CONFIG_SPL_MAX_SIZE=0x40000 +CONFIG_SPL_PAD_TO=0x7f8000 +CONFIG_SPL_HAS_BSS_LINKER_SECTION=y +CONFIG_SPL_BSS_START_ADDR=0x4000000 +CONFIG_SPL_BSS_MAX_SIZE=0x4000 +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set +CONFIG_SPL_STACK_R=y +CONFIG_SPL_ATF=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_GPT=y +CONFIG_CMD_I2C=y +CONFIG_CMD_MMC=y +CONFIG_CMD_PMIC=y +CONFIG_CMD_REGULATOR=y +# CONFIG_SPL_DOS_PARTITION is not set +CONFIG_SPL_OF_CONTROL=y +CONFIG_OF_LIVE=y +CONFIG_NET=n +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_SPL_REGMAP=y +CONFIG_SPL_SYSCON=y +CONFIG_SPL_CLK=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_ROCKCHIP_GPIO_V2=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MISC=y +CONFIG_SUPPORT_EMMC_RPMB=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_SDMA=y +CONFIG_MMC_SDHCI_ROCKCHIP=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_GMAC_ROCKCHIP=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_RK8XX=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_REGULATOR_PWM=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_SPL_RAM=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYS_NS16550_MEM32=y +CONFIG_SYSRESET=y +CONFIG_SYSRESET_PSCI=y +CONFIG_ERRNO_STR=y +CONFIG_SYS_PROMPT="BPI-R2PRO> " +CONFIG_CMD_SYSBOOT=y +CONFIG_CMD_BOOTDEV=y +CONFIG_BOOTSTD_FULL=y +CONFIG_CMD_EFICONFIG=n +CONFIG_EFI_LOADER=n +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_DWC3_GENERIC=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB_UHCI_HCD=y +CONFIG_USB_DWC2=y +CONFIG_USB_DWC3=y +CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y +CONFIG_PHY_ROCKCHIP_INNO_USB2=y +CONFIG_CMD_USB=y +CONFIG_AHCI=y +CONFIG_DWC_AHCI=y +CONFIG_SCSI=y +CONFIG_DM_SCSI=y +CONFIG_CMD_SCSI=y