| Message ID | 20230606170918.45581-6-jagan@amarulasolutions.com |
|---|---|
| State | Accepted |
| Commit | 9aa93d84038bb47bcd4e9ac4287ef63e1b022971 |
| Delegated to: | Kever Yang |
| Headers | show |
| Series | rockchip: Fix RK3328 USB support | expand |
El Tue, Jun 06, 2023 at 10:39:16PM +0530, Jagan Teki deia: > USB2.0 Host and OTG controllers in RK3328 are using USB2PHY. > > Add support for it. > > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Xavier Drudis Ferran <xdrudis@tinet.cat> (fwiw, I just compared it with linux) I just wanted to note this patch as written most likely depends on https://patchwork.ozlabs.org/project/uboot/patch/464111fca83008503022e8ada5305e69ffd1afbd.1685974993.git.xdrudis@tinet.cat/ which introduces the struct member clkout_ctl used here. > --- > Changes for v2: > - add clkout_ctl > > drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 34 +++++++++++++++++++ > 1 file changed, 34 insertions(+) > > diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c > index e43a5ba9b5..d8738f891d 100644 > --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c > +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c > @@ -345,6 +345,36 @@ bind_fail: > return ret; > } > > +static const struct rockchip_usb2phy_cfg rk3328_usb2phy_cfgs[] = { > + { > + .reg = 0x100, > + .clkout_ctl = { 0x108, 4, 4, 1, 0 }, [...]
On 2023/6/7 01:09, Jagan Teki wrote: > USB2.0 Host and OTG controllers in RK3328 are using USB2PHY. > > Add support for it. > > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Thanks, - Kever > --- > Changes for v2: > - add clkout_ctl > > drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 34 +++++++++++++++++++ > 1 file changed, 34 insertions(+) > > diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c > index e43a5ba9b5..d8738f891d 100644 > --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c > +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c > @@ -345,6 +345,36 @@ bind_fail: > return ret; > } > > +static const struct rockchip_usb2phy_cfg rk3328_usb2phy_cfgs[] = { > + { > + .reg = 0x100, > + .clkout_ctl = { 0x108, 4, 4, 1, 0 }, > + .port_cfgs = { > + [USB2PHY_PORT_OTG] = { > + .phy_sus = { 0x0100, 15, 0, 0, 0x1d1 }, > + .bvalid_det_en = { 0x0110, 3, 2, 0, 3 }, > + .bvalid_det_st = { 0x0114, 3, 2, 0, 3 }, > + .bvalid_det_clr = { 0x0118, 3, 2, 0, 3 }, > + .ls_det_en = { 0x0110, 0, 0, 0, 1 }, > + .ls_det_st = { 0x0114, 0, 0, 0, 1 }, > + .ls_det_clr = { 0x0118, 0, 0, 0, 1 }, > + .utmi_avalid = { 0x0120, 10, 10, 0, 1 }, > + .utmi_bvalid = { 0x0120, 9, 9, 0, 1 }, > + .utmi_ls = { 0x0120, 5, 4, 0, 1 }, > + }, > + [USB2PHY_PORT_HOST] = { > + .phy_sus = { 0x104, 15, 0, 0, 0x1d1 }, > + .ls_det_en = { 0x110, 1, 1, 0, 1 }, > + .ls_det_st = { 0x114, 1, 1, 0, 1 }, > + .ls_det_clr = { 0x118, 1, 1, 0, 1 }, > + .utmi_ls = { 0x120, 17, 16, 0, 1 }, > + .utmi_hstdet = { 0x120, 19, 19, 0, 1 } > + } > + }, > + }, > + { /* sentinel */ } > +}; > + > static const struct rockchip_usb2phy_cfg rk3399_usb2phy_cfgs[] = { > { > .reg = 0xe450, > @@ -498,6 +528,10 @@ static const struct rockchip_usb2phy_cfg rk3588_phy_cfgs[] = { > }; > > static const struct udevice_id rockchip_usb2phy_ids[] = { > + { > + .compatible = "rockchip,rk3328-usb2phy", > + .data = (ulong)&rk3328_usb2phy_cfgs, > + }, > { > .compatible = "rockchip,rk3399-usb2phy", > .data = (ulong)&rk3399_usb2phy_cfgs,
diff --git a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c index e43a5ba9b5..d8738f891d 100644 --- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c +++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c @@ -345,6 +345,36 @@ bind_fail: return ret; } +static const struct rockchip_usb2phy_cfg rk3328_usb2phy_cfgs[] = { + { + .reg = 0x100, + .clkout_ctl = { 0x108, 4, 4, 1, 0 }, + .port_cfgs = { + [USB2PHY_PORT_OTG] = { + .phy_sus = { 0x0100, 15, 0, 0, 0x1d1 }, + .bvalid_det_en = { 0x0110, 3, 2, 0, 3 }, + .bvalid_det_st = { 0x0114, 3, 2, 0, 3 }, + .bvalid_det_clr = { 0x0118, 3, 2, 0, 3 }, + .ls_det_en = { 0x0110, 0, 0, 0, 1 }, + .ls_det_st = { 0x0114, 0, 0, 0, 1 }, + .ls_det_clr = { 0x0118, 0, 0, 0, 1 }, + .utmi_avalid = { 0x0120, 10, 10, 0, 1 }, + .utmi_bvalid = { 0x0120, 9, 9, 0, 1 }, + .utmi_ls = { 0x0120, 5, 4, 0, 1 }, + }, + [USB2PHY_PORT_HOST] = { + .phy_sus = { 0x104, 15, 0, 0, 0x1d1 }, + .ls_det_en = { 0x110, 1, 1, 0, 1 }, + .ls_det_st = { 0x114, 1, 1, 0, 1 }, + .ls_det_clr = { 0x118, 1, 1, 0, 1 }, + .utmi_ls = { 0x120, 17, 16, 0, 1 }, + .utmi_hstdet = { 0x120, 19, 19, 0, 1 } + } + }, + }, + { /* sentinel */ } +}; + static const struct rockchip_usb2phy_cfg rk3399_usb2phy_cfgs[] = { { .reg = 0xe450, @@ -498,6 +528,10 @@ static const struct rockchip_usb2phy_cfg rk3588_phy_cfgs[] = { }; static const struct udevice_id rockchip_usb2phy_ids[] = { + { + .compatible = "rockchip,rk3328-usb2phy", + .data = (ulong)&rk3328_usb2phy_cfgs, + }, { .compatible = "rockchip,rk3399-usb2phy", .data = (ulong)&rk3399_usb2phy_cfgs,
USB2.0 Host and OTG controllers in RK3328 are using USB2PHY. Add support for it. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> --- Changes for v2: - add clkout_ctl drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+)