From patchwork Mon May 22 21:47:08 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?q?Ond=C5=99ej_Jirman?= X-Patchwork-Id: 1784707 X-Patchwork-Delegate: agust@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (1024-bit key; secure) header.d=xff.cz header.i=@xff.cz header.a=rsa-sha256 header.s=mail header.b=b9psBY+M; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (P-384)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4QQB1P2TSzz20Pb for ; Tue, 23 May 2023 07:49:29 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 49E34857D2; Mon, 22 May 2023 23:47:42 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=xff.cz Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; secure) header.d=xff.cz header.i=@xff.cz header.b="b9psBY+M"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 93223847B0; Mon, 22 May 2023 23:47:33 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS, T_SCC_BODY_TEXT_LINE autolearn=unavailable autolearn_force=no version=3.4.2 Received: from vps.xff.cz (vps.xff.cz [195.181.215.36]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 5C49C856D1 for ; Mon, 22 May 2023 23:47:24 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=xff.cz Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=megi@xff.cz DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=xff.cz; s=mail; t=1684792044; bh=t4DkX/apVZJzj8dzF98bfFo7SPAmcosWbVMNK+MVkv8=; h=From:To:Cc:Subject:Date:References:From; b=b9psBY+MEAdhru3I6VBB5rpATPykdiWkp4GGuQr4i3Q0yBoj84Y2OpBUlvG3wOt4+ Etd46HzqHdICBqGQZ8DkJCQti1IX0Pt8aqBJG0/f3C1qDGEiAnE+Sgh5V0GZisam2R fohRXGQEN11CoKIdodvdU2rorz6USnKMHdua/CTk= From: megi@xff.cz To: u-boot@lists.denx.de Cc: Ondrej Jirman , Anatolij Gustschin , Simon Glass , Philipp Tomsich , Kever Yang , Chris Morgan Subject: [PATCH 8/8] video: rockchip: dw_mipi_dsi: Fix GRF access Date: Mon, 22 May 2023 23:47:08 +0200 Message-Id: <20230522214708.3886796-9-megi@xff.cz> In-Reply-To: <20230522214708.3886796-1-megi@xff.cz> References: <20230522214708.3886796-1-megi@xff.cz> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean From: Ondrej Jirman Use proper register base and access method to access GRF registers. GRF registers start at a completely different base, and need special access method, that sets the change mask in the 16 MSBs. Signed-off-by: Ondrej Jirman --- drivers/video/rockchip/dw_mipi_dsi_rockchip.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/drivers/video/rockchip/dw_mipi_dsi_rockchip.c b/drivers/video/rockchip/dw_mipi_dsi_rockchip.c index fd885ac8ccb6..117c3db21ac1 100644 --- a/drivers/video/rockchip/dw_mipi_dsi_rockchip.c +++ b/drivers/video/rockchip/dw_mipi_dsi_rockchip.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -30,6 +31,9 @@ #include #include +#include +#include + #define USEC_PER_SEC 1000000L /* @@ -197,6 +201,7 @@ struct dw_rockchip_dsi_priv { struct mipi_dsi_device device; void __iomem *base; struct udevice *panel; + void __iomem *grf; /* Optional external dphy */ struct phy phy; @@ -752,16 +757,13 @@ static int dw_mipi_dsi_rockchip_set_bl(struct udevice *dev, int percent) static void dw_mipi_dsi_rockchip_config(struct dw_rockchip_dsi_priv *dsi) { if (dsi->cdata->lanecfg1_grf_reg) - dsi_write(dsi, dsi->cdata->lanecfg1_grf_reg, - dsi->cdata->lanecfg1); + rk_setreg(dsi->grf + dsi->cdata->lanecfg1_grf_reg, dsi->cdata->lanecfg1); if (dsi->cdata->lanecfg2_grf_reg) - dsi_write(dsi, dsi->cdata->lanecfg2_grf_reg, - dsi->cdata->lanecfg2); + rk_setreg(dsi->grf + dsi->cdata->lanecfg2_grf_reg, dsi->cdata->lanecfg2); if (dsi->cdata->enable_grf_reg) - dsi_write(dsi, dsi->cdata->enable_grf_reg, - dsi->cdata->enable); + rk_setreg(dsi->grf + dsi->cdata->enable_grf_reg, dsi->cdata->enable); } static int dw_mipi_dsi_rockchip_bind(struct udevice *dev) @@ -794,6 +796,8 @@ static int dw_mipi_dsi_rockchip_probe(struct udevice *dev) return -EINVAL; } + priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF); + i = 0; while (cdata[i].reg) { if (cdata[i].reg == (fdt_addr_t)priv->base) {