Message ID | 20230428131814.18.I9026d132c84ec1bbaa14bd1eaec291c778375f35@changeid |
---|---|
State | Superseded |
Delegated to: | Bin Meng |
Headers | show |
Series | bootstd: Add a bootmeth for ChromiumOS on x86 | expand |
Hi Simon, On Sat, Apr 29, 2023 at 3:18 AM Simon Glass <sjg@chromium.org> wrote: > > Add NVME support. I don't see NVMe config is added? > > Add ms so it is easier to search for tables in memory. > > Expand the command-line and print buffers so that we can deal with the > very long ChromeOS command lines. (typically 700 characters). > > Enable BOOTSTD_FULL to get the full set of standard-boot options. > > Replace the existing manual script with 'bootflow scan', since it can > find and boot the OS. > > Finally, expand the malloc() space so we can read large kernels into a > bootflow. > > Signed-off-by: Simon Glass <sjg@chromium.org> > --- > > configs/chromebook_coral_defconfig | 10 ++++++++-- > 1 file changed, 8 insertions(+), 2 deletions(-) > > diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig > index f5995f22004..fe61153b93d 100644 > --- a/configs/chromebook_coral_defconfig > +++ b/configs/chromebook_coral_defconfig > @@ -1,5 +1,6 @@ > CONFIG_X86=y > CONFIG_TEXT_BASE=0x1110000 > +CONFIG_SYS_MALLOC_LEN=0x2000000 > CONFIG_SYS_MALLOC_F_LEN=0x3d00 > CONFIG_NR_DRAM_BANKS=8 > CONFIG_MAX_CPUS=8 > @@ -22,6 +23,7 @@ CONFIG_X86_OFFSET_U_BOOT=0xffd00000 > CONFIG_X86_OFFSET_SPL=0xffe80000 > CONFIG_INTEL_ACPIGEN=y > CONFIG_INTEL_GENERIC_WIFI=y > +CONFIG_BOOTSTD_FULL=y > CONFIG_SYS_MONITOR_BASE=0x01110000 > CONFIG_CHROMEOS=y > CONFIG_BOOTSTAGE=y > @@ -33,8 +35,10 @@ CONFIG_BOOTSTAGE_STASH=y > CONFIG_USE_BOOTARGS=y > CONFIG_BOOTARGS_SUBST=y > CONFIG_USE_BOOTCOMMAND=y > -CONFIG_BOOTCOMMAND="tpm init; tpm startup TPM2_SU_CLEAR; read mmc 0:2 100000 0 80; setexpr loader *001004f0; setexpr size *00100518; setexpr blocks $size / 200; read mmc 0:2 100000 80 $blocks; setexpr setup $loader - 1000; setexpr cmdline_ptr $loader - 2000; setexpr.s cmdline *$cmdline_ptr; setexpr cmdline gsub %U \\\\${uuid}; if part uuid mmc 0:2 uuid; then zboot start 100000 0 0 0 $setup cmdline; zboot load; zboot setup; zboot dump; zboot go;fi" > +CONFIG_BOOTCOMMAND="tpm init; tpm startup TPM2_SU_CLEAR; bootflow scan -lb" > CONFIG_SYS_CONSOLE_INFO_QUIET=y > +CONFIG_LOG=y > +CONFIG_LOGF_FUNC=y > CONFIG_DISPLAY_BOARDINFO_LATE=y > CONFIG_LAST_STAGE_INIT=y > CONFIG_BLOBLIST=y > @@ -52,9 +56,11 @@ CONFIG_SPL_POWER=y > CONFIG_TPL_SYS_MALLOC_SIMPLE=y > CONFIG_TPL_POWER=y > CONFIG_HUSH_PARSER=y > -CONFIG_SYS_PBSIZE=532 > +CONFIG_SYS_CBSIZE=1024 > +CONFIG_SYS_PBSIZE=1024 > CONFIG_CMD_CPU=y > CONFIG_CMD_PMC=y > +CONFIG_CMD_MEM_SEARCH=y > CONFIG_CMD_GPIO=y > CONFIG_CMD_I2C=y > CONFIG_CMD_PART=y > -- Regards, Bin
diff --git a/configs/chromebook_coral_defconfig b/configs/chromebook_coral_defconfig index f5995f22004..fe61153b93d 100644 --- a/configs/chromebook_coral_defconfig +++ b/configs/chromebook_coral_defconfig @@ -1,5 +1,6 @@ CONFIG_X86=y CONFIG_TEXT_BASE=0x1110000 +CONFIG_SYS_MALLOC_LEN=0x2000000 CONFIG_SYS_MALLOC_F_LEN=0x3d00 CONFIG_NR_DRAM_BANKS=8 CONFIG_MAX_CPUS=8 @@ -22,6 +23,7 @@ CONFIG_X86_OFFSET_U_BOOT=0xffd00000 CONFIG_X86_OFFSET_SPL=0xffe80000 CONFIG_INTEL_ACPIGEN=y CONFIG_INTEL_GENERIC_WIFI=y +CONFIG_BOOTSTD_FULL=y CONFIG_SYS_MONITOR_BASE=0x01110000 CONFIG_CHROMEOS=y CONFIG_BOOTSTAGE=y @@ -33,8 +35,10 @@ CONFIG_BOOTSTAGE_STASH=y CONFIG_USE_BOOTARGS=y CONFIG_BOOTARGS_SUBST=y CONFIG_USE_BOOTCOMMAND=y -CONFIG_BOOTCOMMAND="tpm init; tpm startup TPM2_SU_CLEAR; read mmc 0:2 100000 0 80; setexpr loader *001004f0; setexpr size *00100518; setexpr blocks $size / 200; read mmc 0:2 100000 80 $blocks; setexpr setup $loader - 1000; setexpr cmdline_ptr $loader - 2000; setexpr.s cmdline *$cmdline_ptr; setexpr cmdline gsub %U \\\\${uuid}; if part uuid mmc 0:2 uuid; then zboot start 100000 0 0 0 $setup cmdline; zboot load; zboot setup; zboot dump; zboot go;fi" +CONFIG_BOOTCOMMAND="tpm init; tpm startup TPM2_SU_CLEAR; bootflow scan -lb" CONFIG_SYS_CONSOLE_INFO_QUIET=y +CONFIG_LOG=y +CONFIG_LOGF_FUNC=y CONFIG_DISPLAY_BOARDINFO_LATE=y CONFIG_LAST_STAGE_INIT=y CONFIG_BLOBLIST=y @@ -52,9 +56,11 @@ CONFIG_SPL_POWER=y CONFIG_TPL_SYS_MALLOC_SIMPLE=y CONFIG_TPL_POWER=y CONFIG_HUSH_PARSER=y -CONFIG_SYS_PBSIZE=532 +CONFIG_SYS_CBSIZE=1024 +CONFIG_SYS_PBSIZE=1024 CONFIG_CMD_CPU=y CONFIG_CMD_PMC=y +CONFIG_CMD_MEM_SEARCH=y CONFIG_CMD_GPIO=y CONFIG_CMD_I2C=y CONFIG_CMD_PART=y
Add NVME support. Add ms so it is easier to search for tables in memory. Expand the command-line and print buffers so that we can deal with the very long ChromeOS command lines. (typically 700 characters). Enable BOOTSTD_FULL to get the full set of standard-boot options. Replace the existing manual script with 'bootflow scan', since it can find and boot the OS. Finally, expand the malloc() space so we can read large kernels into a bootflow. Signed-off-by: Simon Glass <sjg@chromium.org> --- configs/chromebook_coral_defconfig | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-)