diff mbox series

[3/7] phy: rockchip: naneng-combphy: Add support for multiple resets

Message ID 20230417091951.4640-3-eugen.hristev@collabora.com
State Superseded
Delegated to: Kever Yang
Headers show
Series [1/7] pci: pcie_dw_rockchip: Add rk3588 compatible | expand

Commit Message

Eugen Hristev April 17, 2023, 9:19 a.m. UTC
Some variants of the PHY have more than just one reset.
To cover all cases, request the rests in bulk rather than just
the reset at index 0.

Co-developed-by: Ren Jianing <jianing.ren@rock-chips.com>
Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
---
 drivers/phy/rockchip/phy-rockchip-naneng-combphy.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

Comments

Kever Yang April 21, 2023, 9:30 a.m. UTC | #1
On 2023/4/17 17:19, Eugen Hristev wrote:
> Some variants of the PHY have more than just one reset.
> To cover all cases, request the rests in bulk rather than just
> the reset at index 0.
>
> Co-developed-by: Ren Jianing <jianing.ren@rock-chips.com>
> Signed-off-by: Ren Jianing <jianing.ren@rock-chips.com>
> Signed-off-by: Eugen Hristev <eugen.hristev@collabora.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

Thanks,
- Kever

> ---
>   drivers/phy/rockchip/phy-rockchip-naneng-combphy.c | 8 ++++----
>   1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
> index 78da5fe79700..b673a8da9f8e 100644
> --- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
> +++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
> @@ -76,7 +76,7 @@ struct rockchip_combphy_priv {
>   	struct regmap *pipe_grf;
>   	struct regmap *phy_grf;
>   	struct phy *phy;
> -	struct reset_ctl phy_rst;
> +	struct reset_ctl_bulk phy_rsts;
>   	struct clk ref_clk;
>   	const struct rockchip_combphy_cfg *cfg;
>   };
> @@ -189,7 +189,7 @@ static int rockchip_combphy_init(struct phy *phy)
>   	if (ret)
>   		goto err_clk;
>   
> -	reset_deassert(&priv->phy_rst);
> +	reset_deassert_bulk(&priv->phy_rsts);
>   
>   	return 0;
>   
> @@ -204,7 +204,7 @@ static int rockchip_combphy_exit(struct phy *phy)
>   	struct rockchip_combphy_priv *priv = dev_get_priv(phy->dev);
>   
>   	clk_disable(&priv->ref_clk);
> -	reset_assert(&priv->phy_rst);
> +	reset_assert_bulk(&priv->phy_rsts);
>   
>   	return 0;
>   }
> @@ -255,7 +255,7 @@ static int rockchip_combphy_parse_dt(struct udevice *dev,
>   		return PTR_ERR(&priv->ref_clk);
>   	}
>   
> -	ret = reset_get_by_index(dev, 0, &priv->phy_rst);
> +	ret = reset_get_bulk(dev, &priv->phy_rsts);
>   	if (ret) {
>   		dev_err(dev, "no phy reset control specified\n");
>   		return ret;
diff mbox series

Patch

diff --git a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
index 78da5fe79700..b673a8da9f8e 100644
--- a/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
+++ b/drivers/phy/rockchip/phy-rockchip-naneng-combphy.c
@@ -76,7 +76,7 @@  struct rockchip_combphy_priv {
 	struct regmap *pipe_grf;
 	struct regmap *phy_grf;
 	struct phy *phy;
-	struct reset_ctl phy_rst;
+	struct reset_ctl_bulk phy_rsts;
 	struct clk ref_clk;
 	const struct rockchip_combphy_cfg *cfg;
 };
@@ -189,7 +189,7 @@  static int rockchip_combphy_init(struct phy *phy)
 	if (ret)
 		goto err_clk;
 
-	reset_deassert(&priv->phy_rst);
+	reset_deassert_bulk(&priv->phy_rsts);
 
 	return 0;
 
@@ -204,7 +204,7 @@  static int rockchip_combphy_exit(struct phy *phy)
 	struct rockchip_combphy_priv *priv = dev_get_priv(phy->dev);
 
 	clk_disable(&priv->ref_clk);
-	reset_assert(&priv->phy_rst);
+	reset_assert_bulk(&priv->phy_rsts);
 
 	return 0;
 }
@@ -255,7 +255,7 @@  static int rockchip_combphy_parse_dt(struct udevice *dev,
 		return PTR_ERR(&priv->ref_clk);
 	}
 
-	ret = reset_get_by_index(dev, 0, &priv->phy_rst);
+	ret = reset_get_bulk(dev, &priv->phy_rsts);
 	if (ret) {
 		dev_err(dev, "no phy reset control specified\n");
 		return ret;