diff mbox series

[v2,10/12] ARM: dts: uniphier: Fix node names and missing reg property in USB glue node

Message ID 20230201011325.10679-11-hayashi.kunihiko@socionext.com
State Superseded
Delegated to: Bin Meng
Headers show
Series usb: dwc3: Refactor dwc3-generic and apply to dwc3-uniphier | expand

Commit Message

Kunihiko Hayashi Feb. 1, 2023, 1:13 a.m. UTC 
The node name should follow the generic name list in DT specification.
This moves "reset" to "reset-controller", "hs-phy" and "ss-phy" to "phy"
in the USB glue node.

And the node should have reg property to define the register region.

Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
---
 arch/arm/dts/uniphier-ld20.dtsi | 15 ++++++++-------
 arch/arm/dts/uniphier-pro4.dtsi |  7 ++++---
 arch/arm/dts/uniphier-pro5.dtsi | 15 ++++++++-------
 arch/arm/dts/uniphier-pxs2.dtsi | 20 +++++++++++---------
 arch/arm/dts/uniphier-pxs3.dtsi | 20 +++++++++++---------
 5 files changed, 42 insertions(+), 35 deletions(-)

Comments

Marek Vasut Feb. 1, 2023, 9:55 p.m. UTC | #1 
On 2/1/23 02:13, Kunihiko Hayashi wrote:
> The node name should follow the generic name list in DT specification.
> This moves "reset" to "reset-controller", "hs-phy" and "ss-phy" to "phy"
> in the USB glue node.
> 
> And the node should have reg property to define the register region.
> 
> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
> ---
>   arch/arm/dts/uniphier-ld20.dtsi | 15 ++++++++-------
>   arch/arm/dts/uniphier-pro4.dtsi |  7 ++++---
>   arch/arm/dts/uniphier-pro5.dtsi | 15 ++++++++-------
>   arch/arm/dts/uniphier-pxs2.dtsi | 20 +++++++++++---------
>   arch/arm/dts/uniphier-pxs3.dtsi | 20 +++++++++++---------
>   5 files changed, 42 insertions(+), 35 deletions(-)

I don't mind this patch, but would it make sense to later, in a separate 
patch, synchronize the .dtsi with Linux kernel fully ?
Kunihiko Hayashi Feb. 2, 2023, 5:13 a.m. UTC | #2 
Hi Marek,

On 2023/02/02 6:55, Marek Vasut wrote:
> On 2/1/23 02:13, Kunihiko Hayashi wrote:
>> The node name should follow the generic name list in DT specification.
>> This moves "reset" to "reset-controller", "hs-phy" and "ss-phy" to "phy"
>> in the USB glue node.
>>
>> And the node should have reg property to define the register region.
>>
>> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
>> ---
>>    arch/arm/dts/uniphier-ld20.dtsi | 15 ++++++++-------
>>    arch/arm/dts/uniphier-pro4.dtsi |  7 ++++---
>>    arch/arm/dts/uniphier-pro5.dtsi | 15 ++++++++-------
>>    arch/arm/dts/uniphier-pxs2.dtsi | 20 +++++++++++---------
>>    arch/arm/dts/uniphier-pxs3.dtsi | 20 +++++++++++---------
>>    5 files changed, 42 insertions(+), 35 deletions(-)
> 
> I don't mind this patch, but would it make sense to later, in a separate
> patch, synchronize the .dtsi with Linux kernel fully ?

I see.

I also think I should to synchronize the devicetree with Linux, so
I'll separate this patch from this series in the next.

Thank you,

---
Best Regards
Kunihiko Hayashi
Marek Vasut Feb. 2, 2023, 12:53 p.m. UTC | #3 
On 2/2/23 06:13, Kunihiko Hayashi wrote:
> Hi Marek,

Hello Hayashi-san,

> On 2023/02/02 6:55, Marek Vasut wrote:
>> On 2/1/23 02:13, Kunihiko Hayashi wrote:
>>> The node name should follow the generic name list in DT specification.
>>> This moves "reset" to "reset-controller", "hs-phy" and "ss-phy" to "phy"
>>> in the USB glue node.
>>>
>>> And the node should have reg property to define the register region.
>>>
>>> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
>>> ---
>>>    arch/arm/dts/uniphier-ld20.dtsi | 15 ++++++++-------
>>>    arch/arm/dts/uniphier-pro4.dtsi |  7 ++++---
>>>    arch/arm/dts/uniphier-pro5.dtsi | 15 ++++++++-------
>>>    arch/arm/dts/uniphier-pxs2.dtsi | 20 +++++++++++---------
>>>    arch/arm/dts/uniphier-pxs3.dtsi | 20 +++++++++++---------
>>>    5 files changed, 42 insertions(+), 35 deletions(-)
>>
>> I don't mind this patch, but would it make sense to later, in a separate
>> patch, synchronize the .dtsi with Linux kernel fully ?
> 
> I see.
> 
> I also think I should to synchronize the devicetree with Linux, so
> I'll separate this patch from this series in the next.

I am fine if you do the full DT synchronization in a separate patch.

Feel free to keep this smaller DT update as part of this series to keep 
the USB functional.
diff mbox series

Patch

diff --git a/arch/arm/dts/uniphier-ld20.dtsi b/arch/arm/dts/uniphier-ld20.dtsi
index 4549935c42..21a431ab7f 100644
--- a/arch/arm/dts/uniphier-ld20.dtsi
+++ b/arch/arm/dts/uniphier-ld20.dtsi
@@ -765,11 +765,12 @@ 
 		usb-glue@65b00000 {
 			compatible = "socionext,uniphier-ld20-dwc3-glue",
 				     "simple-mfd";
+			reg = <0x65b00000 0x4000>;
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges = <0 0x65b00000 0x400>;
 
-			usb_rst: reset@0 {
+			usb_rst: reset-controller@0 {
 				compatible = "socionext,uniphier-ld20-usb3-reset";
 				reg = <0x0 0x4>;
 				#reset-cells = <1>;
@@ -815,7 +816,7 @@ 
 				resets = <&sys_rst 14>;
 			};
 
-			usb_hsphy0: hs-phy@200 {
+			usb_hsphy0: phy@200 {
 				compatible = "socionext,uniphier-ld20-usb3-hsphy";
 				reg = <0x200 0x10>;
 				#phy-cells = <0>;
@@ -829,7 +830,7 @@ 
 					      <&usb_hs_i0>;
 			};
 
-			usb_hsphy1: hs-phy@210 {
+			usb_hsphy1: phy@210 {
 				compatible = "socionext,uniphier-ld20-usb3-hsphy";
 				reg = <0x210 0x10>;
 				#phy-cells = <0>;
@@ -843,7 +844,7 @@ 
 					      <&usb_hs_i0>;
 			};
 
-			usb_hsphy2: hs-phy@220 {
+			usb_hsphy2: phy@220 {
 				compatible = "socionext,uniphier-ld20-usb3-hsphy";
 				reg = <0x220 0x10>;
 				#phy-cells = <0>;
@@ -857,7 +858,7 @@ 
 					      <&usb_hs_i2>;
 			};
 
-			usb_hsphy3: hs-phy@230 {
+			usb_hsphy3: phy@230 {
 				compatible = "socionext,uniphier-ld20-usb3-hsphy";
 				reg = <0x230 0x10>;
 				#phy-cells = <0>;
@@ -871,7 +872,7 @@ 
 					      <&usb_hs_i2>;
 			};
 
-			usb_ssphy0: ss-phy@300 {
+			usb_ssphy0: phy@300 {
 				compatible = "socionext,uniphier-ld20-usb3-ssphy";
 				reg = <0x300 0x10>;
 				#phy-cells = <0>;
@@ -882,7 +883,7 @@ 
 				vbus-supply = <&usb_vbus0>;
 			};
 
-			usb_ssphy1: ss-phy@310 {
+			usb_ssphy1: phy@310 {
 				compatible = "socionext,uniphier-ld20-usb3-ssphy";
 				reg = <0x310 0x10>;
 				#phy-cells = <0>;
diff --git a/arch/arm/dts/uniphier-pro4.dtsi b/arch/arm/dts/uniphier-pro4.dtsi
index 9dae4e9b23..0e0a30ab40 100644
--- a/arch/arm/dts/uniphier-pro4.dtsi
+++ b/arch/arm/dts/uniphier-pro4.dtsi
@@ -521,6 +521,7 @@ 
 		usb-glue@65b00000 {
 			compatible = "socionext,uniphier-pro4-dwc3-glue",
 				     "simple-mfd";
+			reg = <0x65b00000 0x100>;
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges = <0 0x65b00000 0x100>;
@@ -534,7 +535,7 @@ 
 				resets = <&sys_rst 12>, <&sys_rst 14>;
 			};
 
-			usb0_ssphy: ss-phy@10 {
+			usb0_ssphy: phy@10 {
 				compatible = "socionext,uniphier-pro4-usb3-ssphy";
 				reg = <0x10 0x10>;
 				#phy-cells = <0>;
@@ -545,7 +546,7 @@ 
 				vbus-supply = <&usb0_vbus>;
 			};
 
-			usb0_rst: reset@40 {
+			usb0_rst: reset-controller@40 {
 				compatible = "socionext,uniphier-pro4-usb3-reset";
 				reg = <0x40 0x4>;
 				#reset-cells = <1>;
@@ -606,7 +607,7 @@ 
 				resets = <&sys_rst 12>, <&sys_rst 15>;
 			};
 
-			usb1_rst: reset@40 {
+			usb1_rst: reset-controller@40 {
 				compatible = "socionext,uniphier-pro4-usb3-reset";
 				reg = <0x40 0x4>;
 				#reset-cells = <1>;
diff --git a/arch/arm/dts/uniphier-pro5.dtsi b/arch/arm/dts/uniphier-pro5.dtsi
index 19848e36fa..6122ee6164 100644
--- a/arch/arm/dts/uniphier-pro5.dtsi
+++ b/arch/arm/dts/uniphier-pro5.dtsi
@@ -483,11 +483,12 @@ 
 		usb-glue@65b00000 {
 			compatible = "socionext,uniphier-pro5-dwc3-glue",
 				     "simple-mfd";
+			reg = <0x65b00000 0x400>;
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges = <0 0x65b00000 0x400>;
 
-			usb0_rst: reset@0 {
+			usb0_rst: reset-controller@0 {
 				compatible = "socionext,uniphier-pro5-usb3-reset";
 				reg = <0x0 0x4>;
 				#reset-cells = <1>;
@@ -506,7 +507,7 @@ 
 				resets = <&sys_rst 12>, <&sys_rst 14>;
 			};
 
-			usb0_hsphy0: hs-phy@280 {
+			usb0_hsphy0: phy@280 {
 				compatible = "socionext,uniphier-pro5-usb3-hsphy";
 				reg = <0x280 0x10>;
 				#phy-cells = <0>;
@@ -517,7 +518,7 @@ 
 				vbus-supply = <&usb0_vbus0>;
 			};
 
-			usb0_ssphy0: ss-phy@380 {
+			usb0_ssphy0: phy@380 {
 				compatible = "socionext,uniphier-pro5-usb3-ssphy";
 				reg = <0x380 0x10>;
 				#phy-cells = <0>;
@@ -551,7 +552,7 @@ 
 			#size-cells = <1>;
 			ranges = <0 0x65d00000 0x400>;
 
-			usb1_rst: reset@0 {
+			usb1_rst: reset-controller@0 {
 				compatible = "socionext,uniphier-pro5-usb3-reset";
 				reg = <0x0 0x4>;
 				#reset-cells = <1>;
@@ -579,7 +580,7 @@ 
 				resets = <&sys_rst 12>, <&sys_rst 15>;
 			};
 
-			usb1_hsphy0: hs-phy@280 {
+			usb1_hsphy0: phy@280 {
 				compatible = "socionext,uniphier-pro5-usb3-hsphy";
 				reg = <0x280 0x10>;
 				#phy-cells = <0>;
@@ -590,7 +591,7 @@ 
 				vbus-supply = <&usb1_vbus0>;
 			};
 
-			usb1_hsphy1: hs-phy@290 {
+			usb1_hsphy1: phy@290 {
 				compatible = "socionext,uniphier-pro5-usb3-hsphy";
 				reg = <0x290 0x10>;
 				#phy-cells = <0>;
@@ -601,7 +602,7 @@ 
 				vbus-supply = <&usb1_vbus1>;
 			};
 
-			usb1_ssphy0: ss-phy@380 {
+			usb1_ssphy0: phy@380 {
 				compatible = "socionext,uniphier-pro5-usb3-ssphy";
 				reg = <0x380 0x10>;
 				#phy-cells = <0>;
diff --git a/arch/arm/dts/uniphier-pxs2.dtsi b/arch/arm/dts/uniphier-pxs2.dtsi
index 7a8b6c10f4..cafa14e22e 100644
--- a/arch/arm/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/dts/uniphier-pxs2.dtsi
@@ -612,11 +612,12 @@ 
 		usb-glue@65b00000 {
 			compatible = "socionext,uniphier-pxs2-dwc3-glue",
 				     "simple-mfd";
+			reg = <0x65b00000 0x400>;
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges = <0 0x65b00000 0x400>;
 
-			usb0_rst: reset@0 {
+			usb0_rst: reset-controller@0 {
 				compatible = "socionext,uniphier-pxs2-usb3-reset";
 				reg = <0x0 0x4>;
 				#reset-cells = <1>;
@@ -644,7 +645,7 @@ 
 				resets = <&sys_rst 14>;
 			};
 
-			usb0_hsphy0: hs-phy@200 {
+			usb0_hsphy0: phy@200 {
 				compatible = "socionext,uniphier-pxs2-usb3-hsphy";
 				reg = <0x200 0x10>;
 				#phy-cells = <0>;
@@ -655,7 +656,7 @@ 
 				vbus-supply = <&usb0_vbus0>;
 			};
 
-			usb0_hsphy1: hs-phy@210 {
+			usb0_hsphy1: phy@210 {
 				compatible = "socionext,uniphier-pxs2-usb3-hsphy";
 				reg = <0x210 0x10>;
 				#phy-cells = <0>;
@@ -666,7 +667,7 @@ 
 				vbus-supply = <&usb0_vbus1>;
 			};
 
-			usb0_ssphy0: ss-phy@300 {
+			usb0_ssphy0: phy@300 {
 				compatible = "socionext,uniphier-pxs2-usb3-ssphy";
 				reg = <0x300 0x10>;
 				#phy-cells = <0>;
@@ -677,7 +678,7 @@ 
 				vbus-supply = <&usb0_vbus0>;
 			};
 
-			usb0_ssphy1: ss-phy@310 {
+			usb0_ssphy1: phy@310 {
 				compatible = "socionext,uniphier-pxs2-usb3-ssphy";
 				reg = <0x310 0x10>;
 				#phy-cells = <0>;
@@ -726,11 +727,12 @@ 
 		usb-glue@65d00000 {
 			compatible = "socionext,uniphier-pxs2-dwc3-glue",
 				     "simple-mfd";
+			reg = <0x65d00000 0x400>;
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges = <0 0x65d00000 0x400>;
 
-			usb1_rst: reset@0 {
+			usb1_rst: reset-controller@0 {
 				compatible = "socionext,uniphier-pxs2-usb3-reset";
 				reg = <0x0 0x4>;
 				#reset-cells = <1>;
@@ -758,7 +760,7 @@ 
 				resets = <&sys_rst 15>;
 			};
 
-			usb1_hsphy0: hs-phy@200 {
+			usb1_hsphy0: phy@200 {
 				compatible = "socionext,uniphier-pxs2-usb3-hsphy";
 				reg = <0x200 0x10>;
 				#phy-cells = <0>;
@@ -769,7 +771,7 @@ 
 				vbus-supply = <&usb1_vbus0>;
 			};
 
-			usb1_hsphy1: hs-phy@210 {
+			usb1_hsphy1: phy@210 {
 				compatible = "socionext,uniphier-pxs2-usb3-hsphy";
 				reg = <0x210 0x10>;
 				#phy-cells = <0>;
@@ -780,7 +782,7 @@ 
 				vbus-supply = <&usb1_vbus1>;
 			};
 
-			usb1_ssphy0: ss-phy@300 {
+			usb1_ssphy0: phy@300 {
 				compatible = "socionext,uniphier-pxs2-usb3-ssphy";
 				reg = <0x300 0x10>;
 				#phy-cells = <0>;
diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi
index 004656c992..1b0f49e00d 100644
--- a/arch/arm/dts/uniphier-pxs3.dtsi
+++ b/arch/arm/dts/uniphier-pxs3.dtsi
@@ -614,11 +614,12 @@ 
 		usb-glue@65b00000 {
 			compatible = "socionext,uniphier-pxs3-dwc3-glue",
 				     "simple-mfd";
+			reg = <0x65b00000 0x400>;
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges = <0 0x65b00000 0x400>;
 
-			usb0_rst: reset@0 {
+			usb0_rst: reset-controller@0 {
 				compatible = "socionext,uniphier-pxs3-usb3-reset";
 				reg = <0x0 0x4>;
 				#reset-cells = <1>;
@@ -646,7 +647,7 @@ 
 				resets = <&sys_rst 12>;
 			};
 
-			usb0_hsphy0: hs-phy@200 {
+			usb0_hsphy0: phy@200 {
 				compatible = "socionext,uniphier-pxs3-usb3-hsphy";
 				reg = <0x200 0x10>;
 				#phy-cells = <0>;
@@ -660,7 +661,7 @@ 
 					      <&usb_hs_i0>;
 			};
 
-			usb0_hsphy1: hs-phy@210 {
+			usb0_hsphy1: phy@210 {
 				compatible = "socionext,uniphier-pxs3-usb3-hsphy";
 				reg = <0x210 0x10>;
 				#phy-cells = <0>;
@@ -674,7 +675,7 @@ 
 					      <&usb_hs_i0>;
 			};
 
-			usb0_ssphy0: ss-phy@300 {
+			usb0_ssphy0: phy@300 {
 				compatible = "socionext,uniphier-pxs3-usb3-ssphy";
 				reg = <0x300 0x10>;
 				#phy-cells = <0>;
@@ -685,7 +686,7 @@ 
 				vbus-supply = <&usb0_vbus0>;
 			};
 
-			usb0_ssphy1: ss-phy@310 {
+			usb0_ssphy1: phy@310 {
 				compatible = "socionext,uniphier-pxs3-usb3-ssphy";
 				reg = <0x310 0x10>;
 				#phy-cells = <0>;
@@ -735,11 +736,12 @@ 
 		usb-glue@65d00000 {
 			compatible = "socionext,uniphier-pxs3-dwc3-glue",
 				     "simple-mfd";
+			reg = <0x65b00000 0x400>;
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges = <0 0x65d00000 0x400>;
 
-			usb1_rst: reset@0 {
+			usb1_rst: reset-controller@0 {
 				compatible = "socionext,uniphier-pxs3-usb3-reset";
 				reg = <0x0 0x4>;
 				#reset-cells = <1>;
@@ -767,7 +769,7 @@ 
 				resets = <&sys_rst 13>;
 			};
 
-			usb1_hsphy0: hs-phy@200 {
+			usb1_hsphy0: phy@200 {
 				compatible = "socionext,uniphier-pxs3-usb3-hsphy";
 				reg = <0x200 0x10>;
 				#phy-cells = <0>;
@@ -782,7 +784,7 @@ 
 					      <&usb_hs_i2>;
 			};
 
-			usb1_hsphy1: hs-phy@210 {
+			usb1_hsphy1: phy@210 {
 				compatible = "socionext,uniphier-pxs3-usb3-hsphy";
 				reg = <0x210 0x10>;
 				#phy-cells = <0>;
@@ -797,7 +799,7 @@ 
 					      <&usb_hs_i2>;
 			};
 
-			usb1_ssphy0: ss-phy@300 {
+			usb1_ssphy0: phy@300 {
 				compatible = "socionext,uniphier-pxs3-usb3-ssphy";
 				reg = <0x300 0x10>;
 				#phy-cells = <0>;