diff mbox series

[131/171] Correct SPL use of RENESAS_SDHI

Message ID	20230130151612.212732-132-sjg@chromium.org
State	Changes Requested
Delegated to:	Tom Rini
Headers	show Return-Path: <u-boot-bounces@lists.denx.de> From: Simon Glass <sjg@chromium.org> To: U-Boot Mailing List <u-boot@lists.denx.de> Cc: Tom Rini <trini@konsulko.com>, Simon Glass <sjg@chromium.org>, Jaehoon Chung <jh80.chung@samsung.com>, Peng Fan <peng.fan@nxp.com> Subject: [PATCH 131/171] Correct SPL use of RENESAS_SDHI Date: Mon, 30 Jan 2023 08:15:32 -0700 Message-Id: <20230130151612.212732-132-sjg@chromium.org> In-Reply-To: <20230130151612.212732-102-sjg@chromium.org> References: <20230130151612.212732-102-sjg@chromium.org> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Precedence: list Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" <u-boot-bounces@lists.denx.de>
Series	None \| expand [101/171] Correct SPL uses of I8259_PIC [102/171] Correct SPL uses of IMX8M [103/171] Correct SPL use of IMX8MN_BEACON_2GB_LPDDR [104/171] Correct SPL uses of IMX_MODULE_FUSE [105/171] Correct SPL uses of IMX_RDC [106/171] Correct SPL uses of LMB [107/171] Correct SPL uses of MICROBLAZE [108/171] Correct SPL use of MIPS_CM [109/171] Correct SPL use of MMC_QUIRKS [110/171] Correct SPL uses of MTD [111/171] Correct SPL uses of MULTIPLEXER [112/171] Correct SPL uses of NEEDS_MANUAL_RELOC [113/171] Correct SPL use of NETDEVICES [114/171] Correct SPL uses of NXP_FSPI [115/171] Correct SPL use of OCTEON_SERIAL_BOOTCMD [116/171] Correct SPL use of OCTEON_SERIAL_PCIE_CONSOLE [117/171] Correct SPL uses of OF_BOARD [118/171] Correct SPL use of OF_EMBED [119/171] Correct SPL use of PANEL [120/171] Correct SPL use of PARTITION_TYPE_GUID [121/171] Correct SPL use of PCI_PNP [122/171] Correct SPL uses of PG_WCOM_UBOOT_BOOTPACKAGE [123/171] Correct SPL uses of PG_WCOM_UBOOT_UPDATE [124/171] Correct SPL use of PG_WCOM_UBOOT_UPDATE_SUPPORTED [125/171] Correct SPL use of PHY_CADENCE_SIERRA [126/171] Correct SPL use of PHY_CADENCE_TORRENT [127/171] Correct SPL uses of PHY_FIXED [128/171] Correct SPL uses of PMIC_STPMIC1 [129/171] Correct SPL use of QFW_PIO [130/171] Correct SPL use of REGEX [131/171] Correct SPL use of RENESAS_SDHI [132/171] Correct SPL use of RESV_RAM [133/171] Correct SPL uses of ROCKCHIP_EFUSE [134/171] Correct SPL uses of ROCKCHIP_OTP [135/171] Correct SPL use of SANDBOX [136/171] Correct SPL uses of SANDBOX_CLK_CCF [137/171] Correct SPL uses of SAVE_PREV_BL_FDT_ADDR [138/171] Correct SPL uses of SAVE_PREV_BL_INITRAMFS_START_ADDR [139/171] Correct SPL uses of SEC_FIRMWARE_ARMV8_PSCI [140/171] Correct SPL uses of SIFIVE_OTP [141/171] Correct SPL use of SL28CPLD [142/171] Correct SPL use of SL28_SPL_LOADS_OPTEE_BL32 [143/171] Correct SPL use of SPI_FLASH_BAR [144/171] Correct SPL uses of SPI_FLASH_MACRONIX [145/171] Correct SPL use of SPLASH_SOURCE [146/171] Correct SPL use of STM32MP15X_STM32IMAGE [147/171] Correct SPL use of SUPPORT_EMMC_RPMB [148/171] Correct SPL use of SYS_FSL_ERRATUM_A010539 [149/171] Correct SPL uses of SYS_LONGHELP [150/171] Correct SPL use of SYS_MEM_RSVD_FOR_MMU [151/171] Correct SPL uses of TARGET_LX2160ARDB [152/171] Correct SPL use of TARGET_MX6UL_9X9_EVK [153/171] Correct SPL use of TARGET_PG_WCOM_EXPU1 [154/171] Correct SPL use of TARGET_PG_WCOM_SELI8 [155/171] Correct SPL use of TEE [156/171] Correct SPL uses of TEN64_CONTROLLER [157/171] Correct SPL use of TPM_RNG [158/171] Correct SPL use of UDP_FUNCTION_FASTBOOT [159/171] Correct SPL use of USB_DWC3_MESON_G12A [160/171] Correct SPL uses of USB_DWC3_MESON_GXL [161/171] Correct SPL use of USB_FUNCTION_FASTBOOT [162/171] Correct SPL uses of USB_GADGET_DWC2_OTG [163/171] Correct SPL uses of USB_KEYBOARD [164/171] Correct SPL uses of USB_MUSB_HOST [165/171] Correct SPL uses of VIDEO [166/171] Correct SPL use of VIDEO_ANSI [167/171] Correct SPL use of VIDEO_BPP16 [168/171] Correct SPL use of VIDEO_BPP32 [169/171] Correct SPL use of WATCHDOG_AUTOSTART [170/171] Correct SPL uses of XEN_SERIAL [171/171] Correct SPL uses of ZYNQMP_FIRMWARE

Commit Message

Simon Glass Jan. 30, 2023, 3:15 p.m. UTC

This converts 1 usage of this option to the non-SPL form, since there is
no SPL_RENESAS_SDHI defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

 drivers/mmc/tmio-common.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff mbox series

Patch

diff --git a/drivers/mmc/tmio-common.h b/drivers/mmc/tmio-common.h
index 59d5a0e22e9..b1556bba5d9 100644
--- a/drivers/mmc/tmio-common.h
+++ b/drivers/mmc/tmio-common.h
@@ -139,7 +139,7 @@  struct tmio_sd_priv {
 #if CONFIG_IS_ENABLED(CLK)
 	struct clk			clk;
 #endif
-#if CONFIG_IS_ENABLED(RENESAS_SDHI)
+#if IS_ENABLED(CONFIG_RENESAS_SDHI)
 	unsigned int			smpcmp;
 	u8				tap_set;
 	u8				tap_num;