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[108/171] Correct SPL use of MIPS_CM

Message ID 20230130151612.212732-109-sjg@chromium.org
State Changes Requested
Delegated to: Tom Rini
Headers show
Series None | expand

Commit Message

Simon Glass Jan. 30, 2023, 3:15 p.m. UTC 
This converts 1 usage of this option to the non-SPL form, since there is
no SPL_MIPS_CM defined in Kconfig

Signed-off-by: Simon Glass <sjg@chromium.org>
---

 arch/mips/include/asm/cm.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
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Patch

diff --git a/arch/mips/include/asm/cm.h b/arch/mips/include/asm/cm.h
index 5cc8c09621d..c695ffc71f5 100644
--- a/arch/mips/include/asm/cm.h
+++ b/arch/mips/include/asm/cm.h
@@ -108,7 +108,7 @@ 
 #include <asm/io.h>
 #include <linux/bitops.h>
 
-#if CONFIG_IS_ENABLED(MIPS_CM)
+#if IS_ENABLED(CONFIG_MIPS_CM)
 static inline void *mips_cm_base(void)
 {
 	return (void *)CKSEG1ADDR(CONFIG_MIPS_CM_BASE);