| Message ID | 20221218205013.1.I2299f1eddce5aa7d5fb1a3fb4d8aeaa995b397fa@changeid |
|---|---|
| State | Superseded |
| Delegated to: | Simon Glass |
| Headers | show |
| Series | rockchip: Only call binman when TPL available | expand |
Hi Kever, On Sun, 18 Dec 2022 at 05:50, Kever Yang <kever.yang@rock-chips.com> wrote: > > Rockchip platform use TPL to do the DRAM initialize for all the SoCs, > if TPL is not available, means no available DRAM init program, and the > u-boot-rockchip.bin is not functionable. > > Signed-off-by: Kever Yang <kever.yang@rock-chips.com> > --- > > arch/arm/dts/rockchip-u-boot.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) Can you please look at the series to convert things to binman? I found another problem with it so can send v8, but I'd really like some reviews on that. For this patch, can you explain what the problem is right now? > > diff --git a/arch/arm/dts/rockchip-u-boot.dtsi b/arch/arm/dts/rockchip-u-boot.dtsi > index 584f21eb5bf..e2b0f389711 100644 > --- a/arch/arm/dts/rockchip-u-boot.dtsi > +++ b/arch/arm/dts/rockchip-u-boot.dtsi > @@ -11,7 +11,7 @@ > }; > }; > > -#ifdef CONFIG_SPL > +#ifdef CONFIG_TPL_BUILD > &binman { > simple-bin { > filename = "u-boot-rockchip.bin"; > -- > 2.25.1 > Regards, Simon
Hi Kever, On 12/18/22 13:50, Kever Yang wrote: > Rockchip platform use TPL to do the DRAM initialize for all the SoCs, > if TPL is not available, means no available DRAM init program, and the Why would the TPL not be available? Are you thinking about the TPL being provided externally as a blob? Also, we literally had less than 24h to review this patch before it was merged (without review) in rc3.... Can you please explain what's the issue so we know what we have to deal with in the future? Because the commit log is not precise enough for me to understand the corner case you hit. Cheers, Quentin > u-boot-rockchip.bin is not functionable. > > Signed-off-by: Kever Yang <kever.yang@rock-chips.com> > --- > > arch/arm/dts/rockchip-u-boot.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm/dts/rockchip-u-boot.dtsi b/arch/arm/dts/rockchip-u-boot.dtsi > index 584f21eb5bf..e2b0f389711 100644 > --- a/arch/arm/dts/rockchip-u-boot.dtsi > +++ b/arch/arm/dts/rockchip-u-boot.dtsi > @@ -11,7 +11,7 @@ > }; > }; > > -#ifdef CONFIG_SPL > +#ifdef CONFIG_TPL_BUILD > &binman { > simple-bin { > filename = "u-boot-rockchip.bin";
diff --git a/arch/arm/dts/rockchip-u-boot.dtsi b/arch/arm/dts/rockchip-u-boot.dtsi index 584f21eb5bf..e2b0f389711 100644 --- a/arch/arm/dts/rockchip-u-boot.dtsi +++ b/arch/arm/dts/rockchip-u-boot.dtsi @@ -11,7 +11,7 @@ }; }; -#ifdef CONFIG_SPL +#ifdef CONFIG_TPL_BUILD &binman { simple-bin { filename = "u-boot-rockchip.bin";
Rockchip platform use TPL to do the DRAM initialize for all the SoCs, if TPL is not available, means no available DRAM init program, and the u-boot-rockchip.bin is not functionable. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> --- arch/arm/dts/rockchip-u-boot.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)