diff mbox series

[PoC,216/241] global: Migrate CONFIG_TSECV2 to CFG

Message ID 20221120141743.3059310-17-trini@konsulko.com
State RFC
Delegated to: Tom Rini
Headers show
Series None | expand

Commit Message

Tom Rini Nov. 20, 2022, 2:17 p.m. UTC 
Signed-off-by: Tom Rini <trini@konsulko.com>
---
 arch/powerpc/include/asm/config_mpc85xx.h | 18 +++++++++---------
 arch/powerpc/include/asm/immap_85xx.h     |  4 ++--
 scripts/config_whitelist.txt              |  4 ++--
 3 files changed, 13 insertions(+), 13 deletions(-)
diff mbox series

Patch

diff --git a/arch/powerpc/include/asm/config_mpc85xx.h b/arch/powerpc/include/asm/config_mpc85xx.h
index 0a67c76b61d6..b81ce1f98ba2 100644
--- a/arch/powerpc/include/asm/config_mpc85xx.h
+++ b/arch/powerpc/include/asm/config_mpc85xx.h
@@ -24,18 +24,18 @@ 
 
 #elif defined(CONFIG_ARCH_P1010)
 #define CFG_FSL_SDHC_V2_3
-#define CONFIG_TSECV2
+#define CFG_TSECV2
 #define CONFIG_SYS_FSL_IFC_BANK_COUNT	4
 
 /* P1011 is single core version of P1020 */
 #elif defined(CONFIG_ARCH_P1011)
-#define CONFIG_TSECV2
+#define CFG_TSECV2
 
 #elif defined(CONFIG_ARCH_P1020)
-#define CONFIG_TSECV2
+#define CFG_TSECV2
 
 #elif defined(CONFIG_ARCH_P1021)
-#define CONFIG_TSECV2
+#define CFG_TSECV2
 #define QE_MURAM_SIZE			0x6000UL
 #define MAX_QE_RISC			1
 #define QE_NUM_OF_SNUM			28
@@ -49,11 +49,11 @@ 
 
 /* P1024 is lower end variant of P1020 */
 #elif defined(CONFIG_ARCH_P1024)
-#define CONFIG_TSECV2
+#define CFG_TSECV2
 
 /* P1025 is lower end variant of P1021 */
 #elif defined(CONFIG_ARCH_P1025)
-#define CONFIG_TSECV2
+#define CFG_TSECV2
 #define QE_MURAM_SIZE			0x6000UL
 #define MAX_QE_RISC			1
 #define QE_NUM_OF_SNUM			28
@@ -108,12 +108,12 @@ 
 
 #elif defined(CONFIG_ARCH_BSC9131)
 #define CFG_FSL_SDHC_V2_3
-#define CONFIG_TSECV2
+#define CFG_TSECV2
 #define CONFIG_SYS_FSL_IFC_BANK_COUNT	3
 
 #elif defined(CONFIG_ARCH_BSC9132)
 #define CFG_FSL_SDHC_V2_3
-#define CONFIG_TSECV2
+#define CFG_TSECV2
 #define CONFIG_SYS_FSL_IFC_BANK_COUNT	3
 
 #elif defined(CONFIG_ARCH_T4240)
@@ -221,7 +221,7 @@ 
 
 #elif defined(CONFIG_ARCH_C29X)
 #define CFG_FSL_SDHC_V2_3
-#define CONFIG_TSECV2_1
+#define CFG_TSECV2_1
 #define CONFIG_SYS_FSL_IFC_BANK_COUNT	8
 #define CFG_SYS_FSL_SEC_IDX_OFFSET	0x20000
 
diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h
index 05b83952f231..7fdbf8504f32 100644
--- a/arch/powerpc/include/asm/immap_85xx.h
+++ b/arch/powerpc/include/asm/immap_85xx.h
@@ -2541,9 +2541,9 @@  struct ccsr_pman {
 #define CFG_SYS_MPC85xx_USB2_OFFSET		0x23000
 #define CFG_SYS_MPC85xx_USB1_PHY_OFFSET	0xE5000
 #define CFG_SYS_MPC85xx_USB2_PHY_OFFSET	0xE5100
-#ifdef CONFIG_TSECV2
+#ifdef CFG_TSECV2
 #define CFG_SYS_TSEC1_OFFSET			0xB0000
-#elif defined(CONFIG_TSECV2_1)
+#elif defined(CFG_TSECV2_1)
 #define CFG_SYS_TSEC1_OFFSET			0x10000
 #else
 #define CFG_SYS_TSEC1_OFFSET			0x24000
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index fa67d6fe3468..1d60965b520c 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -229,8 +229,8 @@  CFG_TSEC3
 CFG_TSEC3_NAME
 CFG_TSEC4
 CFG_TSEC4_NAME
-CONFIG_TSECV2
-CONFIG_TSECV2_1
+CFG_TSECV2
+CFG_TSECV2_1
 CONFIG_TSEC_TBICR_SETTINGS
 CONFIG_UBIFS_VOLUME
 CONFIG_UBI_PART