diff mbox series

[PoC,183/241] global: Migrate CONFIG_SH_ETHER_PHY_MODE to CFG

Message ID 20221120140829.3057894-74-trini@konsulko.com
State RFC
Delegated to: Tom Rini
Headers show
Series None | expand

Commit Message

Tom Rini Nov. 20, 2022, 2:08 p.m. UTC
Signed-off-by: Tom Rini <trini@konsulko.com>
---
 drivers/net/sh_eth.c         | 2 +-
 include/configs/alt.h        | 2 +-
 include/configs/condor.h     | 2 +-
 include/configs/gose.h       | 2 +-
 include/configs/grpeach.h    | 2 +-
 include/configs/koelsch.h    | 2 +-
 include/configs/lager.h      | 2 +-
 include/configs/porter.h     | 2 +-
 include/configs/silk.h       | 2 +-
 include/configs/stout.h      | 2 +-
 scripts/config_whitelist.txt | 2 +-
 11 files changed, 11 insertions(+), 11 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c
index 70ec27999062..9bdc42ced24f 100644
--- a/drivers/net/sh_eth.c
+++ b/drivers/net/sh_eth.c
@@ -536,7 +536,7 @@  static int sh_eth_phy_config_legacy(struct sh_eth_dev *eth)
 
 	phydev = phy_connect(
 			miiphy_get_dev_by_name(dev->name),
-			port_info->phy_addr, dev, CONFIG_SH_ETHER_PHY_MODE);
+			port_info->phy_addr, dev, CFG_SH_ETHER_PHY_MODE);
 	port_info->phydev = phydev;
 	phy_config(phydev);
 
diff --git a/include/configs/alt.h b/include/configs/alt.h
index 8dd4b101c668..283af8a324e3 100644
--- a/include/configs/alt.h
+++ b/include/configs/alt.h
@@ -26,7 +26,7 @@ 
 /* SH Ether */
 #define CONFIG_SH_ETHER_USE_PORT	0
 #define CFG_SH_ETHER_PHY_ADDR	0x1
-#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
+#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
 #define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE
 #define CFG_SH_ETHER_ALIGNE_SIZE	64
diff --git a/include/configs/condor.h b/include/configs/condor.h
index 43b88f127213..2c9817cf02c5 100644
--- a/include/configs/condor.h
+++ b/include/configs/condor.h
@@ -16,7 +16,7 @@ 
 /* SH Ether */
 #define CONFIG_SH_ETHER_USE_PORT	0
 #define CFG_SH_ETHER_PHY_ADDR	0x1
-#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
+#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
 #define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE
 #define CFG_SH_ETHER_ALIGNE_SIZE	64
diff --git a/include/configs/gose.h b/include/configs/gose.h
index 5184db41061f..ed7dd70dd964 100644
--- a/include/configs/gose.h
+++ b/include/configs/gose.h
@@ -22,7 +22,7 @@ 
 /* SH Ether */
 #define CONFIG_SH_ETHER_USE_PORT	0
 #define CFG_SH_ETHER_PHY_ADDR	0x1
-#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
+#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
 #define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE
 #define CFG_SH_ETHER_ALIGNE_SIZE	64
diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h
index 8ba9b73672c8..6a11aa61f0fb 100644
--- a/include/configs/grpeach.h
+++ b/include/configs/grpeach.h
@@ -19,7 +19,7 @@ 
 /* Network interface */
 #define CONFIG_SH_ETHER_USE_PORT	0
 #define CFG_SH_ETHER_PHY_ADDR	0
-#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
+#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
 #define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE
 #define CFG_SH_ETHER_ALIGNE_SIZE	64
diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h
index 2910336def6c..31d0795f07fb 100644
--- a/include/configs/koelsch.h
+++ b/include/configs/koelsch.h
@@ -22,7 +22,7 @@ 
 /* SH Ether */
 #define CONFIG_SH_ETHER_USE_PORT	0
 #define CFG_SH_ETHER_PHY_ADDR	0x1
-#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
+#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
 #define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE
 #define CFG_SH_ETHER_ALIGNE_SIZE	64
diff --git a/include/configs/lager.h b/include/configs/lager.h
index 815239a73bd4..991fc9020ee0 100644
--- a/include/configs/lager.h
+++ b/include/configs/lager.h
@@ -23,7 +23,7 @@ 
 /* SH Ether */
 #define CONFIG_SH_ETHER_USE_PORT	0
 #define CFG_SH_ETHER_PHY_ADDR	0x1
-#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
+#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
 #define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE
 #define CFG_SH_ETHER_ALIGNE_SIZE	64
diff --git a/include/configs/porter.h b/include/configs/porter.h
index 8ba6a7d3bc8e..3b7dcd8e94b8 100644
--- a/include/configs/porter.h
+++ b/include/configs/porter.h
@@ -27,7 +27,7 @@ 
 /* SH Ether */
 #define CONFIG_SH_ETHER_USE_PORT	0
 #define CFG_SH_ETHER_PHY_ADDR	0x1
-#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
+#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
 #define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE
 #define CFG_SH_ETHER_ALIGNE_SIZE	64
diff --git a/include/configs/silk.h b/include/configs/silk.h
index df5f0a246241..46615c46f6ec 100644
--- a/include/configs/silk.h
+++ b/include/configs/silk.h
@@ -27,7 +27,7 @@ 
 /* SH Ether */
 #define CONFIG_SH_ETHER_USE_PORT	0
 #define CFG_SH_ETHER_PHY_ADDR	0x1
-#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
+#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
 #define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE
 #define CFG_SH_ETHER_ALIGNE_SIZE	64
diff --git a/include/configs/stout.h b/include/configs/stout.h
index a0a1c50cacdf..3bc569c908a0 100644
--- a/include/configs/stout.h
+++ b/include/configs/stout.h
@@ -31,7 +31,7 @@ 
 /* SH Ether */
 #define CONFIG_SH_ETHER_USE_PORT	0
 #define CFG_SH_ETHER_PHY_ADDR	0x1
-#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
+#define CFG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
 #define CFG_SH_ETHER_CACHE_WRITEBACK
 #define CFG_SH_ETHER_CACHE_INVALIDATE
 #define CFG_SH_ETHER_ALIGNE_SIZE	64
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index 1513dc9458e6..fa784171f026 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -192,7 +192,7 @@  CFG_SH_ETHER_ALIGNE_SIZE
 CFG_SH_ETHER_CACHE_INVALIDATE
 CFG_SH_ETHER_CACHE_WRITEBACK
 CFG_SH_ETHER_PHY_ADDR
-CONFIG_SH_ETHER_PHY_MODE
+CFG_SH_ETHER_PHY_MODE
 CONFIG_SH_ETHER_USE_PORT
 CONFIG_SH_QSPI_BASE
 CONFIG_SLIC