diff mbox series

[PoC,143/241] global: Migrate CONFIG_PEN_ADDR_BIG_ENDIAN to CFG

Message ID 20221120140829.3057894-34-trini@konsulko.com
State RFC
Delegated to: Tom Rini
Headers show
Series None | expand

Commit Message

Tom Rini Nov. 20, 2022, 2:07 p.m. UTC
Signed-off-by: Tom Rini <trini@konsulko.com>
---
 arch/arm/cpu/armv7/nonsec_virt.S | 2 +-
 include/configs/ls1021aiot.h     | 2 +-
 include/configs/ls1021aqds.h     | 2 +-
 include/configs/ls1021atwr.h     | 2 +-
 scripts/config_whitelist.txt     | 2 +-
 5 files changed, 5 insertions(+), 5 deletions(-)
diff mbox series

Patch

diff --git a/arch/arm/cpu/armv7/nonsec_virt.S b/arch/arm/cpu/armv7/nonsec_virt.S
index b6d144f065d2..51beda79c967 100644
--- a/arch/arm/cpu/armv7/nonsec_virt.S
+++ b/arch/arm/cpu/armv7/nonsec_virt.S
@@ -211,7 +211,7 @@  ENTRY(smp_waitloop)
 	wfi
 	ldr	r1, =CONFIG_SMP_PEN_ADDR	@ load start address
 	ldr	r1, [r1]
-#ifdef CONFIG_PEN_ADDR_BIG_ENDIAN
+#ifdef CFG_PEN_ADDR_BIG_ENDIAN
 	rev	r1, r1
 #endif
 	cmp	r0, r1			@ make sure we dont execute this code
diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h
index 7a9a89d02390..cc6d07b40620 100644
--- a/include/configs/ls1021aiot.h
+++ b/include/configs/ls1021aiot.h
@@ -89,7 +89,7 @@ 
 
 #define FSL_PCIE_COMPAT		"fsl,ls1021a-pcie"
 
-#define CONFIG_PEN_ADDR_BIG_ENDIAN
+#define CFG_PEN_ADDR_BIG_ENDIAN
 #define CONFIG_SMP_PEN_ADDR		0x01ee0200
 
 #define HWCONFIG_BUFFER_SIZE		256
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index be05ab9de8cb..ccbf7c2e70dc 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -273,7 +273,7 @@ 
 #define TSEC3_PHYIDX			0
 #endif
 
-#define CONFIG_PEN_ADDR_BIG_ENDIAN
+#define CFG_PEN_ADDR_BIG_ENDIAN
 #define CONFIG_SMP_PEN_ADDR		0x01ee0200
 
 #define HWCONFIG_BUFFER_SIZE		256
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index da1e409e5c77..a554ee459042 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -154,7 +154,7 @@ 
 
 /* GPIO */
 
-#define CONFIG_PEN_ADDR_BIG_ENDIAN
+#define CFG_PEN_ADDR_BIG_ENDIAN
 #define CONFIG_SMP_PEN_ADDR		0x01ee0200
 
 #define HWCONFIG_BUFFER_SIZE		256
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index adf41306e819..ca5faaeea1a3 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -152,7 +152,7 @@  CFG_OTHBOOTARGS
 CFG_OVERWRITE_ETHADDR_ONCE
 CFG_PCIE_IMX_PERST_GPIO
 CFG_PCIE_IMX_POWER_GPIO
-CONFIG_PEN_ADDR_BIG_ENDIAN
+CFG_PEN_ADDR_BIG_ENDIAN
 CONFIG_PHY_BASE_ADR
 CONFIG_PHY_ET1011C_TX_CLK_FIX
 CONFIG_PHY_ID