@@ -141,7 +141,7 @@ static void lpc32xx_nand_init(void)
clk = get_hclk_clk_rate();
writel(
- clkdiv(CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY, 0x03, 24) |
+ clkdiv(CFG_LPC32XX_NAND_MLC_TCEA_DELAY, 0x03, 24) |
clkdiv(CFG_LPC32XX_NAND_MLC_BUSY_DELAY, 0x1F, 19) |
clkdiv(CFG_LPC32XX_NAND_MLC_NAND_TA, 0x07, 16) |
clkdiv(CFG_LPC32XX_NAND_MLC_RD_HIGH, 0x0F, 12) |
@@ -27,7 +27,7 @@
* NAND chip timings for FIXME: which one?
*/
-#define CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY 333333333
+#define CFG_LPC32XX_NAND_MLC_TCEA_DELAY 333333333
#define CFG_LPC32XX_NAND_MLC_BUSY_DELAY 10000000
#define CFG_LPC32XX_NAND_MLC_NAND_TA 18181818
#define CFG_LPC32XX_NAND_MLC_RD_HIGH 31250000
@@ -105,7 +105,7 @@ CFG_LPC32XX_NAND_MLC_BUSY_DELAY
CFG_LPC32XX_NAND_MLC_NAND_TA
CFG_LPC32XX_NAND_MLC_RD_HIGH
CFG_LPC32XX_NAND_MLC_RD_LOW
-CONFIG_LPC32XX_NAND_MLC_TCEA_DELAY
+CFG_LPC32XX_NAND_MLC_TCEA_DELAY
CONFIG_LPC32XX_NAND_MLC_WR_HIGH
CONFIG_LPC32XX_NAND_MLC_WR_LOW
CONFIG_LPC32XX_NAND_SLC_RDR_CLKS
Signed-off-by: Tom Rini <trini@konsulko.com> --- drivers/mtd/nand/raw/lpc32xx_nand_mlc.c | 2 +- include/configs/work_92105.h | 2 +- scripts/config_whitelist.txt | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-)