Message ID | 20221027060202.2495112-3-padmarao.begari@microchip.com |
---|---|
State | Accepted |
Delegated to: | Andes |
Headers | show |
Series | Update Microchip PolarFire SoC | expand |
> From: Padmarao Begari <padmarao.begari@microchip.com> > Sent: Thursday, October 27, 2022 2:02 PM > To: u-boot@lists.denx.de; jagan@amarulasolutions.com; Rick Jian-Zhi Chen(陳建志) <rick@andestech.com>; Leo Yu-Chi Liang(梁育齊) <ycliang@andestech.com>; bmeng.cn@gmail.com > Cc: cyril.jean@microchip.com; conor.dooley@microchip.com; valentina.fernandezalanis@microchip.com; nagasuresh.relli@microchip.com; Padmarao Begari <padmarao.begari@microchip.com> > Subject: [PATCH v3 2/4] riscv: dts: Add QSPI NAND device node > > Add QSPI NAND device node to the Microchip PolarFire SoC Icicle kit device tree. > > The Winbond NAND flash memory can be connected to the Icicle Kit by using the Mikroe Flash 5 click board and the Pi 3 Click shield. > > Signed-off-by: Padmarao Begari <padmarao.begari@microchip.com> > Reviewed-by: Conor Dooley <conor.dooley@microchip.com> > --- > arch/riscv/dts/microchip-mpfs-icicle-kit.dts | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) Reviewed-by: Rick Chen <rick@andestech.com>
diff --git a/arch/riscv/dts/microchip-mpfs-icicle-kit.dts b/arch/riscv/dts/microchip-mpfs-icicle-kit.dts index 48fc2bf06a..762dcfc694 100644 --- a/arch/riscv/dts/microchip-mpfs-icicle-kit.dts +++ b/arch/riscv/dts/microchip-mpfs-icicle-kit.dts @@ -19,6 +19,7 @@ aliases { serial1 = &uart1; ethernet0 = &mac1; + spi0 = &qspi; }; chosen { @@ -114,3 +115,18 @@ ti,fifo-depth = <0x1>; }; }; + +&qspi { + status = "okay"; + num-cs = <1>; + + flash0: flash@0 { + compatible = "spi-nand"; + reg = <0x0>; + spi-tx-bus-width = <4>; + spi-rx-bus-width = <4>; + spi-max-frequency = <20000000>; + spi-cpol; + spi-cpha; + }; +};