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[v3,1/5] imx8m: USDHC3 base address definition for i.MX8MP

Message ID 20220916102415.1250496-1-martyn.welch@collabora.co.uk
State Changes Requested
Delegated to: Stefano Babic
Headers show
Series [v3,1/5] imx8m: USDHC3 base address definition for i.MX8MP | expand

Commit Message

Martyn Welch Sept. 16, 2022, 10:24 a.m. UTC 
From: Martyn Welch <martyn.welch@collabora.com>

The i.MX8MP also has USDHC3, allow access to the relvant base address
definition.

Signed-off-by: Martyn Welch <martyn.welch@collabora.com>
---

Changes in v2:
 - None

Changes in v3:
 - None

 arch/arm/include/asm/arch-imx8m/imx-regs.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/arch/arm/include/asm/arch-imx8m/imx-regs.h b/arch/arm/include/asm/arch-imx8m/imx-regs.h
index 6969cde26c..d8952342e0 100644
--- a/arch/arm/include/asm/arch-imx8m/imx-regs.h
+++ b/arch/arm/include/asm/arch-imx8m/imx-regs.h
@@ -46,7 +46,7 @@ 
 #define USDHC1_BASE_ADDR	0x30B40000
 #define USDHC2_BASE_ADDR	0x30B50000
 #define QSPI0_AMBA_BASE     0x08000000
-#ifdef CONFIG_IMX8MM
+#if defined(CONFIG_IMX8MM) || defined(CONFIG_IMX8MP)
 #define USDHC3_BASE_ADDR	0x30B60000
 #endif
 #define UART_BASE_ADDR(n)	(			\