@@ -1388,10 +1388,10 @@ static int npcm7xx_gpio_reset_persist(struct udevice *dev, unsigned int banknum,
dev_dbg(dev, "set gpio persist, bank %d, enable %d\n", banknum, enable);
if (enable) {
- regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD0RCR, BIT(num) | CA9C_RESET, 0);
- regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD1RCR, BIT(num) | CA9C_RESET, 0);
- regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD2RCR, BIT(num) | CA9C_RESET, 0);
- regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_CORSTC, BIT(num) | CA9C_RESET, 0);
+ regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD0RCR, BIT(num), 0);
+ regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD1RCR, BIT(num), 0);
+ regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD2RCR, BIT(num), 0);
+ regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_CORSTC, BIT(num), 0);
} else {
regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD0RCR, BIT(num) | CA9C_RESET, BIT(num) | CA9C_RESET);
regmap_update_bits(priv->rst_regmap, NPCM7XX_RST_WD1RCR, BIT(num) | CA9C_RESET, BIT(num) | CA9C_RESET);
CA9C is cortex A9 watchdog reset control bit. if device set persist mode, it shouldn't set this bit. Signed-off-by: Jim Liu <JJLIU0@nuvoton.com> --- drivers/pinctrl/nuvoton/pinctrl-npcm7xx.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)